problems with operation and I2C

The supercapacitors are on a separate PCB (Includes the balancer).

Hello,

Thank you for your questions. Interesting about the I2C address. The IC is set with the 7-bit address of 0x09 with the W/R bit (0x12 and 0x13). I have not ever heard of the I2C address being a problem previously. 

Hello,

Thank you for your questions. Interesting about the I2C address. The IC is set with the 7-bit address of 0x09 with the W/R bit (0x12 and 0x13). I have not ever heard of the I2C address being a problem previously. Maybe there is a noise issue because of layout or something. It might be good to look at some scope shots on the I2C.

The schematic looked OK. The PFI falling threshold should be set above the VCAP set voltage. For a design where the OUTFET is not needed, C48 can be decreased a little, maybe 4.7nF. 

I do not see anything obvious from the schematic that will cause this issue. Is it possible to get a scope shot of the startup with VIN, SW, and /PFO?

How closely were the PCB layout recommendations followed in the datasheet? Is it possible to also share the layout?

Hi Marty.

I have readjusted the PFI and CAPFB dividers so that PFI is bigger than CAPFB. (But it still does not work.).

PFI adjusted at 10.81V,   and CAPFB=10.14V.

I am attaching the screenshots of PFO and SW.

VIN (CH1) / PFO (CH2) on Falling Vin.

VIN (Ch1) / SW (ch2)

And the PCB Layout: (4 Layers.  Layer Stack: GND, GND, GND, VIN)

This is the I2C bus reading of the LTC3350 registers: (in case it helps with anything)

Thank's a lot.

Hello.
I'm still unable to make any progress.
Any ideas?

Thank's a lot.