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LTC3351 - Unstable Vout with 2A Iout

Category: Hardware
Product Number: LTC3351

Hello everyone,

I'm encountering an issue with the LTC3351 when it's operating in backup mode.

My circuit is very similar to the DC2464A-B evaluation board.

The problem arises when, in backup mode, the load requires an output current of, for example, 2A.

At that point, both Vout and Vcap become unstable. However, the evaluation board with the same load doesn't exhibit this issue.

I'm struggling to locate the cause of the problem.

PDF

  • Hello,

    What is the ESR of the capacitors? 

    Based on the schematic I would expect that the backup time should go for more than 9s depending on the ESR of the caps and VCAP should be less than 5V when this occurs. From the scope shot it looks like VOUT collapsed much sooner than it should have. Typically, when VOUT collapses it is because of either current limit, the maximum amount of power that can be transferred was reached in the capacitor based on the maximum power transfer rule, (discussed in minimum VCAP voltage in backup mode section page 29 of datasheet), or duty cycle limit (not likely this application).

    I am thinking this might be layout related. Is it possible to share the LTC3351 portion of the layout?

  • Thank you for your answer. The supercapacitors used are 50F from this series https://www.farnell.com/datasheets/2606994.pdf, the ESR is 15mOhm. I am attaching the layout with the various layers of the printed circuit board. I hope it is clear enough.

  • Hello,

    Thank you for the info. 

    There are a couple of things in the layout that are not ideal. The VCAP current sense trace is shared with the CAP4 trace and the CAPFB trace. The trace is much wider from the VCAP copper to the via where the traces split which will help, however it is suggested to Kelvin the traces directly to the center of the resistor to the most accurate measurement. 

    The biggest problem I see is that the VCC2P5 caps C22 and C23 are not close to the pin at all. Ideally the cap should be between the via and the pin. The VCC2P5 pin is the supply for the digital registers. This pin is susceptible to noise and unfortunately right next to the SW pin.  

    Where is C29 and C30? These are the INTVCC and DRVCC caps. DRVCC supplies the fast switching currents for the gate drives. INTVCC supplies the Iq current for the rest of the IC. The caps for these pins should be as close to the part as possible and before the boost diode and cap. There should be a good ground path from the DRVCC cap to the bottom FET, output caps, the ceramic caps on VCAP and the LTC3351 EPAD. 

    To test the VCC2P5 cap, a capacitor can be placed on top of the IC with a wire going directly from the VCC2P5 pin to the SGND pin.

    I am not sure if there is a way to move a cap to the DRVCC trace next to the IC and a good GND connection. 

    Here is a link to the demo board design files to use for a reference if desired. https://www.analog.com/media/en/evaluation-documentation/evaluation-design-files/DC2464A-A.zip

  • Thank you very much for the observations, I have tried to make the changes on the fly but it is not easy, especially the connection to GND. In fact, connecting C29 and C30 to GND near the FET with a cable makes the situation worse. I think the only solution is to redo the PCB following the example of DC2464A faithfully.