I am using ADP5052 as my converter to power an Artic 7 series FPGA. The converter worked well in the first version of the board which was based on this old Arty Schematic rev C1(page11)
On my second version, I realized I do not need the output of the Buck 4 converter since I am not using the DDR3 chip. I disabled Buck 4 converter by connecting pin EN4 through a 10K pull down to GND. It seems like this change might be affecting the output of other channels. PGOOD is low showing that the converter does not like one of the connections. My channels turn should turn on sequentially with in the order of CH2--> CH1 and CH3 --> and CH5 therefore if CH2 is not on, then the rest of the channels are not going to turn on since the enable pins are attached to the output of the previous channels. I probed EN2 and it is 5V as expected.
I also marked the inductor and passives associated with channel 4 as DNP in case I need them in the future. However, the inductor was still placed on the board by the manufacturer. I did pop it off after I realized the converter is not working but that did not change the behavior of the converter. Below is the schematic of my 2nd version of the board that is not working together with the first version which is similar to the Arty Schematic. Any help on narrowing down the source of the issue will be appreciated.
