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ltc4364 - Inrush and FET Selection

Category: Hardware
Product Number: LTC4364-2, LTC4364

I am having an inrush issue with a design using the LTC4364 and FDMC86260.  Initial power on has a negligible inrush but subsequent power cycles have a failing inrush (~15A).  The inrush is aligned with the rise of the input voltage; not the controlled turn on of the FETs (~30ms after input power applied). 

I suspect that the 4V threshold of my FETs are too low and residual voltage on HGATE is allowing Q4 to be partially turned on.  If I probe HGATE directly with an o-scope probe, the issue goes away.  I suspect the 1M load of the probe drains off the residual voltage. 

Is there a way to prevent (or drain) the residual voltage on HGATE?  Is there a recommended minimum Vgs threshold for the FET selection?  Operational Vin is 15V to 40V.

In the image below... CH1 (yellow) in the input voltage.  CH2 (green) is the voltage between Q4 and R43.

Thanks for the help. 

  • I suspect that the 4V threshold of my FETs are too low and residual voltage on HGATE is allowing Q4 to be partially turned on.  If I probe HGATE directly with an o-scope probe, the issue goes away.  I suspect the 1M load of the probe drains off the residual voltage. 

    If you hotplug the first time, inrush control work, since Vgs ramps from 0V to ~12V.
    If you unplug Vin and hotplug again, before Vgs has enough time to drop from leakage, inrush control fails.

    As you found with the scope probe, the solution is a bleeder resistor from GATE to ground. 1MΩ works.
    Don't use too small of a resistance, since the LTC4364 only has 10uA of gate drive (min).

  • Can you comment on the minimum Vgs rating I should use for FET selection?

    Looking at the LTC4364 datasheet, I see M1 FETs with similarly low Vgs thresholds as I chose.  I expected to see FETs with higher thresholds therefore confirming my FET selection was in error but that but that does not seem to be the case.  Am I on the right track that a FET with a higher Vgs will resolve my issue?  Will the designs in the the datasheet also fail repeated hot plug events?

    In terms of adding a bleed resistor... I found that I can replace C137 with a resistor that corrects the hot plug inrush I am failing.  But I am now getting a 3A inrush spike when the LTC4364-2 turns on the FETs.  3A is below our failing threshold but not by much. 

    I did find a 1Meg was too small of a resistor for my circuit.  It does not appear to let the Q3 fully turn on.  A 5.6M seems to allow the Q3 to fully turn on.  I also tested 11.2M (2 x 5.6M) which also worked.  If I move forward with this solution, I'll use a 10M. 

    I am hesitant to replace C173 since it removes my inrush control.  I am also looking for a solution that wont require a board spin. 

    Thanks for the help. 

  • I found that I can replace C137 with a resistor that corrects the hot plug inrush I am failing. 

    Don't replace C137. The ratio of Cgate to Cout determines inrush current.

    I am hesitant to replace C173 since it removes my inrush control.  I am also looking for a solution that wont require a board spin. 

    You can use a through-hole resistor to bleed off the gate charge between hotplugs.

  • Unfortunately, a through hole resistor would not be acceptable.

    Please reply to my Vgs threshold question.  Even a "I do not know" answer would be helpful. 

  • Please reply to my Vgs threshold question.

    Higher threshold for NFETs is preferable in hotswap applications.

  • I tested a FET with a higher threshold but it did not seem to help.  The NTTFS022N15MC I attempted to use has a threshold between 2.5V and 4.5V.  This was only modestly higher than the original FDMC86260 which had a range of 2.0V to 4.0V.  (I did not test the thresholds directly so it it possible their tolerances were working against me.)  This was the only FET I could find that would work with my existing footprint and had a higher threshold.

    I ended up solving my issue with your recommended solution of putting a resistor in parallel with C173.  A 10M resistor and 10nF cap gave me good results.  We plan to stack the two 0603 sized components on top of each other to avoid a board spin. 

    If available, please point me to an app note that discusses how to address multiple hotplug events.  Multiple hotplug events is part of DO-160 testing.   

    Thank you for your help.