LTC4227
Recommended for New Designs
The LTC4227 offers ideal diode-OR and Hot Swap™ functions for two power rails by controlling external Nchannel MOSFETs. MOSFETs acting as ideal diodes...
Datasheet
LTC4227 on Analog.com
LTC4418
Recommended for New Designs
The LTC4418 connects one of two valid power supplies to a common output based on priority and validity. Priority is defined by pin assignment, with V1...
Datasheet
LTC4418 on Analog.com
LTC4421
Recommended for New Designs
The LTC4421 connects one of two input supplies to a common output based on user-defined priority and validity. By definition, the supply connected to V1...
Datasheet
LTC4421 on Analog.com
Hello,
I am working on design where we have redundant battery inputs. I am using a dual bench power supply set at 8.4V both channels representing two 2S fully charge lipo batteries and connected at IN1 and IN2 of the LTC4227.
#D2ON threshold is set to 6.4V for IN1 using a voltage divider
ON pin threshold is set to 6.2V at Sense+ using a voltage divider.
According to the above I was expecting the LTC to switch at IN2 when the IN1 reach the 6.4V (D2ON threshold), but when I start decreasing the IN1 voltage and reach a voltage of 7.8V then the LTC switch to IN2.
Did anyone face that before? LTC4227 switch to IN2 when IN1 has 0.6V less than IN2?
Below our schematic
Thank you,
Alexis Kyriakou
Did anyone face that before? LTC4227 switch to IN2 when IN1 has 0.6V less than IN2?
The key is the 0.6V figure - It's a diode drop.
Q1 and Q2 form a diode-OR, where the higher supply is passed to the output.
Even if you use the D2ON# feature, the diode-OR behavior will still occur due to the body diodes of Q1/2.
I believe the intent of the pin is to disable VIN2's ideal diode and prioritize VIN1.
This works as long as the VSD across Q2 is <0.6V.
Did anyone face that before? LTC4227 switch to IN2 when IN1 has 0.6V less than IN2?
The key is the 0.6V figure - It's a diode drop.
Q1 and Q2 form a diode-OR, where the higher supply is passed to the output.
Even if you use the D2ON# feature, the diode-OR behavior will still occur due to the body diodes of Q1/2.
I believe the intent of the pin is to disable VIN2's ideal diode and prioritize VIN1.
This works as long as the VSD across Q2 is <0.6V.
Ashapiro thank you for the reply.
So, I have to connect the #D2ON to IN1 to keep it HIGH and when the battery from IN1 removed then it will switch to IN2. But if battery at IN1 hits ON threshold first the system will turn off.
So, I have to connect the #D2ON to IN1 to keep it HIGH and when the battery from IN1 removed then it will switch to IN2.
If IN1 goes from 12V to 0V, I agree.
But if battery at IN1 hits ON threshold first the system will turn off.
I don't think system would turn off.
In your schematic, ON is connected to the output of the OR'd supplies through a resistor divider.
Basically, ON will always be connected to the higher of IN1 or IN2.
So even if IN1 drops to 0V, ON will see IN2 (assuming IN2 is present).
I don't think system would turn off.
In your schematic, ON is connected to the output of the OR'd supplies through a resistor divider.
Basically, ON will always be connected to the higher of IN1 or IN2.
So even if IN1 drops to 0V, ON will see IN2 (assuming IN2 is present).
correct.
So, based of my needs, the LTC227 or any other diode-OR is not suitable because i will always have the 0.6V diode drop accross Mosfets, correct?
So, based of my needs, the LTC227 or any other diode-OR is not suitable because i will always have the 0.6V diode drop accross Mosfets, correct?
The 0.6V drop occurs only when an ideal diode is off (Vgs=0V).
When the the IN1 or IN2 channel is enabled, the controller will regulate a 25mV forward voltage across the ideal diode.
Just understand the Q1 and Q2 are basically diodes, not switches.
I recommend that you play with the part in LTSpice to get a feel for part behavior.
Hello Ashapiro,
I did some simulation in LTspice as you propose and after many tests I add back-to-back mosfet and I get the needed result, what is your opinion about using back-to-back?
Thank you,
AlexisLTC4227-1_Nch.asc
I did some simulation in LTspice as you propose and after many tests I add back-to-back mosfet and I get the needed result, what is your opinion about using back-to-back?
If the circuit is doing what you want, that's great.
You basically built a prioritizer, with 3 NFETs in the powerpath; The extra I*R drop will hurt at heavier loads.
If you use a dedicated prioritizer like the LTC4418 or LTC4421, you'll only have 2 FETs in the powerpath.
I recommend the LTC4421, since it has active current limiting and uses NFETs.
Hello Ashapiro,
Is there any solution using passive components to achive the above result ?