Hello, I am actively working on this and will continue to post information.
I get some hardcore ringing that wiggles through my whole board on the rising edge of SW1 and falling edge of SW2. Sounds like typical switch node ringing right? Well.. But not always, sometimes it looks fabulous. And snubbers have had no effect on the ringing.
System:
I put the LT8490 in power supply mode which makes it simply an LT8705 for testing purposes.
M1 = supply FET, high side
M2 = Buck FET, low side
M3 = Boost FET, low side
M4 = Output FET, high side
Vout = 41.5V (floating 36V lead acid battery)
Vin = 32V power supply. current limited to 20 amps or less. *the system is designed for 30amps in and out, 44V battery charging.
I set the poweruspply so it is always in boost mode. The ripple mirrors on both m2 and m3, so if we solve m3 I can fix m2.
Discussion:
The beginning of this problem was the fact that during solar charging, and given certain transition conditions like a cloud went over the sun, the m2 buck low side FETs would suddenly heat up, and not always. The heat would surely lead to part destruction in seconds so I break power. Below is an image I would not show an employer. This explosion of signals happens with every pulse during its failure. *sometimes it snaps out of the failure...
Yellow = M1 FET gate V
Pink = M2 FET gate
Blue = M3 FET gate
green = M4 FET gate
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Here is my latest finding. If you want me to measure anything, let me know.
Yellow = SW2 V
purple = nothing
blue = M3 gate V
green = M4 gate V
Notice in the above several things.
- unstable ringing. deep negative throw, high spike, and the waveform causes the FET to turn on and off a few times.
- notice how the m4 gate voltage, green, is above the SW2 node, yellow, on the right? Thats good, as the gate is supposed to be 6V above it to trigger the high side m4 nMos gate. However notice before the ringing how the SW2 node and M4 Gate voltage match. This means the M4 gate was not on and the inductor was open circuit because the boost FET was also off.
This cycle repeats itself.
The below image is continuing the same cycle which looks like when the m4 gate voltage is proper. The m3 boost FET gate, blue, triggers after the M4 gate has turned off. The ringing you see there is quite acceptable to me. I wish it did this all the time C: wow this guy can do good layout.
Here is an overview of the boost cycling. The buck M2 FET gate is always off, however that ringing that we see also happens on m2 gate when m3 rings. They match magnitude, frequency, 99% match. Though the ringing is not biased on M2 because the gate is not active, the ringing on m2 is enough to make the m2 trigger a few times. Obviously this can lead to the melt down we saw earlier like a run away diesel.
In the image below, That slight ringing on the left is pretty rare, I was able to capture it here in one picture. Almost always it is spotless during m4 fall time when the m4 gate voltage was proper. You can see when there is the heavy ringing and lack of m4 gate voltage in the middle. I dont know what that is. I can't believe its the charge controller having an error. Why the heck is the gate on m4 not getting trigger voltage of SW2 + 6v? I don't know. Thoughts?
Just a measurement showing it rings and sometimes not. When it rings, it is because M4 gate voltage = SW2 (not shown here), instead of Sw2 + 6V.
.Further background. This charger does work, it did a nice 25amps, 40V solar input, 22A charging a 36V batt at 44.4V. *rough numbers don't check efficiency on that. Its usually 98% efficient surprisingly. The fets get toasty as expected, and require active cooling. But when conditions alter, like the solar power declines, or a load on the battery lowers battery voltage, something that causes the LT8490 to adapt to the new voltages, it has a chance of catastrophic failure as shown in the first picture of explosive signals. Clearly an instability.
If you want layout pictures I can show.
Strong ringing only occurs on the falling edge of SW2, and rising edge of SW1. However, not always does the falling edge of SW2 and rising edge of SW1 cause bad ringing, sometimes its super tight. Snubbers have had no effect whatsoever, I tried several article's equations too to size my snubber, and i played with snubber sizes experimentally. Nothing, nope.
I don't rly want to put gate resistors on there... its already a high current system I don't want more switching losses. Because the Switch node ringing is not consistent, I am hoping its not 'actually;' switch node ringing. Is somebody's fall time too long, are my Switch node diodes like.. not conducting ideally?
