thermal via layout for LTC3308A exposed pad

I do not know the answer for 2 or three vias. The thermal vias provide cooling for the part and also a needed GND connection. If the layout calculator is available to calculate the impedance of the vias for the board thickness, copper thickness, and via holes, the number of vias and the via size that provides the least impedance should be used. The LTC3308A is a 4 amp part and the GND connection along with the two PGND pins need to provide a good return path to the VIN caps to provide a short low impedance path in the hot loop (the AC switching currents). If the vias holes are large enough the solder past can wick away from the EPAD and provide a poor connection. With larger vias tenting or filling the vias might be required. 

Hi MartyM

Thank you for the feedback and advise. I'll share the information with our customer.

Regards,

Koide

Hi MartyM

I've shared the information from you with our customer. They have additional questions as follows.

Finally they used four 8-mil VIAs in the four corners within the EPAD, but all solder paste under the EPAD flowed into the VIAs and didn't remain for connection. They would like you to share the information about recommended solder paste type and soldering profile that you used in your evaluation. They are also considering to fill the VIAs with resin, but they would like to avoid the additional cost for it if possible. To prevent the inflow of solder paste to VIAs, please share any other countermeasures that is used in other customers.

Thank you for your advise.

Regards,

Koide

Hi,

Could you please answer for my question above? Thank you for your advise.

Regards,
Koide

Hello,

I understand filling vias can be expensive. Tenting with soldermask is also a method to prevent the vias from wicking away from the epad. Bellow is one document about soldering techniques with the EPADs. I also found another document on our website with other techniques. 

https://www.analog.com/media/en/technical-documentation/application-notes/application_notes_for_thermally_enhanced_leaded_packages.pdf

https://www.analog.com/media/en/technical-documentation/application-notes/EE352.pdf

Hello MartyM

Thank you very much for your advise and the information. I've share them with our customer. It would be great if you share further information below.

According to the LTC3308A datasheet, four 8mil VIAs are recommended as well as five 5mil VIAs. Our customer would like to know the reason why you recommend four 8mil VIAs. If it is based on evaluation in ADI, please share further details about evaluation condition with us including tenting, filling, board thickness. Case example in any other customers are fine.

Thank you for your cooperation.

Regards,

Koide..

Hi Kiode,

The vias we came up with on the evaluation board was done by using calculations from the layout tool to determine what combinations of different size vias will allow the least impedance and current needed for the LTC3308. We did spend some time trying to figure out what will work best with different size vias.

Regards,

Marty

Hi Marty,

Thank you for your quick reply. I have shared the information with our customer.

Regards,

Koide

Hi Kiode,

I would like to make one more comment. We have found that many customers could not do the 5mil vias do to PCB layout constraints. With thicker boards it is not feasible to use small vias and larger vias are needed. That is why we looked into multiple options.

Hi Marty,

Thank you for your additional comment. Our customer is facing same situation, so they try to use 8mil vias but in trouble with solder wicking and connection problem. We would appreciate If you have any other case-study materials to prevent the problem.

Regards,

Koide