My board design is based upon the DC2995A dev board, I've used LT Power CAD to choose the components for it, I've attached my schematic. PDF
It is designed for 58V nominal input and 48V 20A output. The board design is very closely matched to the dev board but over four layers, I've followed all the layout guidelines from the datasheet.
What happens is when the input is less than or approaching the desired output voltage, say 48.4V, I get 45.3V out with 0.796V on the feedback pin the top FET is on for 95% of the time, which is what I expect, this is the top fet gate below:
but as I increase the input voltage to get the desired output, as the FBK voltage reaches 0.8V, the output voltage drops to 2.5V and the top fet gate is now on for 5% of the time, as shown below:
Can anyone shed an light as to why this is happening please?
I'm currently modifying the DC2995A dev board for 48V output to test and compare to mine.
Thanks in anticipation!