LTC3307A Feedback Voltage Tolerance

Hello,

The FB pin is a high impedance input that is part of the control loop. The graph above only shows how the voltage at the FB pin is affected by temperature. In the application circuit the voltage at the FB pin is a function of VOUT thru a voltage divider. The control loop will do what it can to make the voltage from the AGND to FB equal the 0.5V reference. Some things that can affect the regulation are noise getting onto the FB and/or AGND, GND differences between AGND and PGND, ripple voltages, noise coupled thru the CFF cap, etc. These things can be minimized by good layout practices and component selection. It is important to follow the recommended layout as close as possible and to use the components recommended or calculated using the calculations in the datasheet. 

Thanks. The datasheet electrical characteristics section states the FB voltage is held to within 0.495V and 0.505V. 

The way I am interpreting this is that it's the part's internal tolerance regardless of noise on the board, GND differences, or improper layout. I am expecting those would only contribute to make regulation even worse. 

I am interpreting that in your sentence "The control loop will do what it can to make the voltage from the ANG to FB equal to the 0.5V reference." The 0.5V reference can actually vary from between 0.495V and 0.505V, an max possible internal reference voltage error of +/-1%

Can you please confirm if my interpretation is correct and the +/- 1% is accounting for variation over temperature, line conditions, and part-part variation, or is the datasheet actually saying here that the 0.495V to 0.505V range of the FB voltage is trying to account for the contribution of external factors that you referenced (mainly based on board layout/design) to output voltage error?

Hello,

That is correct the control loop will regulate the output voltage to provide what is observed on the FB to AGND pins at the IC within 0.495V to 0.505V over temperature. IR drops and noise including HF noise on these nodes can reduce the voltage observed at the pins of this part. HF noise on these pins can affect the measurement of the FB to AGND pin and can cause poor regulation. If the regulation is reduced the average voltage observed at these pins can fall out of the ±1% window.