Which Voltage is applied to the gate of external NMOS from LT3751 IC?

Question

Hi everyone, 
 I was trying to use the LT3751 IC but even when I replicate the schematic directly from the datasheet it didn't work. Then I read more in detail the datasheet and I got confused in the Voltage applied to the gate of the external NMOS because the gate driver operation says the gate driver has an internal, selectable 10.5V or 5.6V clamp but also the pin HVgate says the internal gate driver will drive the voltage to within VCC &ndash; 2V during each switch cycle and LVgate pin says depending of the connection t he internal gate driver will drive the voltage to the VCC rail . 
 Then, Which voltage is applied to the gate of external NMOS? 
 Thanks for your help.

ADIApproved · Accepted Answer

Hi contr2889, 
 I checked with the product expert and here is the response: 
 
 The LT3751 has 2 internal pull-up drivers. The main driver is an emitter follower and can only pull-up the HVGATE pin to within 2V of VCC or the clamp voltage, whichever is the lower voltage. 
 The LVGATE pin has a low voltage PMOS pull-up that can operate up to 8V VCC. Strapping the LVGATE to HVGATE allows the GATE to be driven all the way to VCC. This helps drive the FET harder in low voltage applications. 
 The CLAMP pin selects an internal clamp circuit to limit the gate voltage to either 10.5V or 5.6V and can help lower switching losses when operating at higher VCC voltages. Operating LVGATE above 5.6V requires the CLAMP to be set to 10.5V.)

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Which Voltage is applied to the gate of external NMOS from LT3751 IC?