LTC3122 Behavior at soft start

Hi team,

Any update on this issue?

I am trying and error by changing the conditions with LTspice.

Even if the Vin voltage is changed, the voltage of the SW node seems to be controlled by Vin + 1V while Vin> Vout.

Please tell me why it becomes Vin + 1V.

Best regards,

T-yoshi

Hi team,

I found a device LTC3459 that has the same output disconnect function as LTC3122.

The LTC3459 datasheet explains that when Vout is less than 3.5V, the bulk of the PMOS is connected to Vin.

I believe the LTC3122 behaves similarly.

Please let me know if it is correct.

Best regards,

T-yoshi

Hi T-yoshi,

Apologies for late response.

1. Shouldn't VOUT approach Vin normally when the High side PMOS is turned on?

ANS: Output disconnect function prevents abrupt startup of VOUT.

2. I think the SW node is controlled, how does the LTC3122 control it? I think this device is characterized by the ability to switch the high side PMOS backgate. Please tell me the state of backgate at normal switching operation and at output disconnected. I would like to know what kind of control it is at startup. I also think it's important to know how the backgate switches.

ANS: We will connect with the design team to explain the details of this function.

Can you provide why you are interested in these details about the LTC3122? Can you provide project info and estimated annual usage? Thanks.

Hi T-yoshi,

Apologies for late response. For #2:

Basically, the substrate of the PMOS is connected to VIN when the input voltage is higher than the output voltage.  In this condition the LTC3122 manages the gate of the PMOS is such a way where the PMOS channel conducts the inductor current, after the low side NMOS turns OFF.  By this way, the inductor current flows through the PMOS channel (albeit in a dissipative fashion, hence the lower efficiency), to the OUT side and allows the output capacitor to charge up.