I am using the DC2642A-A evaluation board for the LTC4041 supercapacitor controller to prototype a fairly standard 5V power backup application.
I have found that the behaviour of the CAPGD output is not consistent with what one would expect based on reading of the datsheet and would appreciate it if somebody can confirm whether the observed reality is correct or whether I should be looking for some kind of problem.
The datasheet block diagram shows the CAPGD signal as being derived from a comparator that compares the supercapacitor voltage at CAPFB against a fixed reference. The CAPGD rising threshold is given as 92.5% of the supercap target charge voltage. The hysteresis is given as 2.5% of this, so one would expect CAPGD to go low when the supercap discharges to 90% of its target charge voltage.
What happens in reality is that, when the input power is removed to initiate a supercap backup, CAPGD goes low 1us after /PFO does. There is no change in the supercap voltage during this period. It then stays low until input power is restored and the supercap has recharged. At this point, the CAPGD rising threshold is as described by the datasheet, i.e. around 92.5% of the target charge voltage. It would appear that the CAPGD comparator output is being internally combined with /PFO in some way.
Unless I am missing something, this CAPGD falling behaviour is not described anywhere in the datasheet for the LTC4041 or the evaluation board. I had been hoping to use the falling edge of CAPGD to trigger shutdown of my load system, thereby allowing the system to ride out short power interruptions that discharge the supercaps by less than 10% or so without shutting down, but this will not be possible if the LTC4041 behaves as observed. It's not a dealbreaker (there are other ways to achieve this) but I would still be grateful if somebody could confirm that what I am seeing is the normal behaviour of CAPGD. If so, it would be nice to get it added to the datasheet.
Thanks for any help - kind regards,
Steve
Benden Technology
