I am simulating with LTSpice LTC3864 operated at high duty cycle, with V(output) close to V(input). I'm using the model for LTC3864 provided by LTSpice.
V(input) = 24V
V(output) = 22V
The output voltage is reached correctly.
Then, the pin RUN is pulled Low to disable the Controller.
Instead of pulling GATE to VCC to turn off the external PMOS, GATE keeps the PMOS permanently ON, at 100% duty cycle, and V(output) increases to 24V.
Is this incorrect behavior a bug in the simulation model, or this is the real behavior of the IC?
Attached is a ZIP with schematic and plot settings.
Thanks,
Mauro Cerisola