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LTC3882 Recommended for New Designs
The LTC3882 is a dual, PolyPhase DC/DC synchronous step-down switching regulator controller with PMBus compliant serial interface. It uses a constant frequency...
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LTC3882 on Analog.com

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LTC3888 Recommended for New Designs
The LTC3888/LTC3888-1/LTC3888-2 is a PMBus-compliant dual loop DC/DC synchronous step-down switching regulator controller with eight expandable phases...
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LTC3888 on Analog.com

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LTC3882 strange VSENSE0- behavior in spice model



		

			

									
					    RKR
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Mar 28, 2022 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hi,
    

    I'm testing LTspice macromodel's design example of LTC3882. It's a 2-phase single output design.
    

    I'm trying to check differential voltage sense input, that should cover any dc drop on board, including ground drop.
    

    When VSENSE0- is tied to GND everything works as usual. However when I try to rise VSENSE0- above GND, plots are not as expected.
    

    Easiest way to test it is to add voltage source at VSENSE0- pin to rise it above GND, and expect the output voltage to rise the same value above GND.
    

    

     
    

    So when I add 0-20 mV above GND to VSENSE0- nothing happens, it just ignores it. Output voltage stays at mean 1 V level. This means output voltage has an 20 mV error from what's expected.
    

    When I add even more - 50 mV above GND, phase 0 just stops working. All load goes via second phase. But it's not just in multiphase example. Even single phase won't work with VSENSE0- 50 mV above GND.
    

     
    

    I've compared this with LTC3888 model. LTC3888 behaves as expected - 50 mV on VSENSE0- rises output voltage by 50 mV without problems.
    

    Is this an LTC3882 spice model issue or a real device behavior?
    
									
			        
		
    

				
						
        

    
    Tags: 
                                            
                 Buck Regulators with Digital Power System Management
                
                                                    
                 External Power Switch Buck Controllers
                
                                                    
                 LTC3888
                
                                                    
                 sense
                
                                                    
                 LTC3882
                
                                        
                                            
                
                
                                
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													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
						
                            
            
            				
            
                on Apr 4, 2022 12:55 AM
            
            
					
      
	
      

		
		
      
					
      Hello,
      

      

      This is a problem with the LTC3882-1 macro model, not the actual circuit. The macro model has two errors:
      

        

      1. The voltage loop is only looking at VSENSEP, not the difference between VSENSEP and VSENSEN. The same error also occurs on phase 0 when the supply is setup for two outputs.
        2. 

      2. The slave phase sinks a large amount of current from the master once VSENSEP and VSENSEN drops below a certain threshold. On the actual LTC3882, this does not happen. On the actual circuit:

          

        1. The slave should monitor the voltage on its VSENSEP pin.
          2. 

        2. The response to a VOUT under-voltage event is programmed with the VOUT_UV_FAULT_RESPONSE command. The controller can be programmed to either ignore the event, turn-off after a delay, turn off immediately and if it does turn-off, it can either remain off or attempt another turn-on. None of these options include the behavior observed in the model.
          3. 

        

        3. 

      

      Furthermore, the LTspice test circuit is using the wrong MOSFET for the bottom FET. It has a miller voltage of 4.9V which is too high for a 5V gate drive. As a result, this MOSFET could not fully turn on which was causing anomalous behavior. After replacing it with a MOSFET (BSC016N04LS) with a 2.9V miller voltage, the switching became normal. When selecting a MOSFET, its miller voltage should be about 3.5V or less with a 5V gate drive to ensure the MOSFET is fully on.
      

       I will inform the LTspice team about the errors in the model.
      

      Best regards,
      

      Mike
      

       
      

      Best regards,
      

       
      

      Mike
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
						
						
				
				
		
		
      
			
		
      
	
      

      

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    • 
	
      



	
			
		
	



      
	
      
		
      
							
					
      
		
      
			
													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      
            
						
                            
            
            				
            
                on Apr 4, 2022 12:55 AM
            
            
					
      
	
      

		
		
      
					
      Hello,
      

      

      This is a problem with the LTC3882-1 macro model, not the actual circuit. The macro model has two errors:
      

        

      1. The voltage loop is only looking at VSENSEP, not the difference between VSENSEP and VSENSEN. The same error also occurs on phase 0 when the supply is setup for two outputs.
        2. 

      2. The slave phase sinks a large amount of current from the master once VSENSEP and VSENSEN drops below a certain threshold. On the actual LTC3882, this does not happen. On the actual circuit:

          

        1. The slave should monitor the voltage on its VSENSEP pin.
          2. 

        2. The response to a VOUT under-voltage event is programmed with the VOUT_UV_FAULT_RESPONSE command. The controller can be programmed to either ignore the event, turn-off after a delay, turn off immediately and if it does turn-off, it can either remain off or attempt another turn-on. None of these options include the behavior observed in the model.
          3. 

        

        3. 

      

      Furthermore, the LTspice test circuit is using the wrong MOSFET for the bottom FET. It has a miller voltage of 4.9V which is too high for a 5V gate drive. As a result, this MOSFET could not fully turn on which was causing anomalous behavior. After replacing it with a MOSFET (BSC016N04LS) with a 2.9V miller voltage, the switching became normal. When selecting a MOSFET, its miller voltage should be about 3.5V or less with a 5V gate drive to ensure the MOSFET is fully on.
      

       I will inform the LTspice team about the errors in the model.
      

      Best regards,
      

      Mike
      

       
      

      Best regards,
      

       
      

      Mike
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
						
						
				
				
		
		
      
			
		
      
	
      

      

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