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LTC3882 multiphase current sharing at load step

Hi,

I'm looking at LTspice macromodel's design example of LTC3882. It's a 2-phase single output design.

In constant load state inductors currents are equal, so the load sharing between phases works as expected.

However when I apply a load step, all additional current goes through one inductor. Second inductor's current increases slowly until it matches first inductor's current.

If I add even more current to step load, the second inductor may even skip a cycle instead of sharing a load, so one phase must be capable of delivering almost all current to the load.

Is that expected behavior of real device or a spice model issue?

Regards,

Rafal

Applied step load to the macromodel's example design:

Inductors currents not equally shared at step load (0.9 ms)

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  • Hello Rafal,

    In the LTC3882 example circuit, phase 0 is the master and phase 1 is the slave. The slave phase has an internal current share error amplifier which adjusts the slave's duty cycle to ensure the inductors currents in the master and slave phases are balanced. During a load step up, the current in the slave phase may lag behind the master slightly. This is due to the delay in the slave's current share error amplifier circuit. A similar delay can be seen in the load step up on page 9 of the data sheet, 3rd row 2nd column.

    The long pulse seen in the example circuit after the load step up is due to the aggressive compensation. With slower compensation, this should not occur.

    Given that the LTC3882 is a voltage mode controller it will require an internal current share error amplifier for accurate current sharing as mentioned above. For most applications, the current share loop works well. If faster dynamic current sharing is required, then consider a  peak current mode controller. The current sharing of current mode controllers is inherently fast since the current sense signal of both phases are compared with the same ITH voltage which is the output of the error amplifier. They do not require a current share error amplifier. Here are a couple of dual phase, peak current mode controllers to consider:

    • LTC3880:dual output poly-phase step-down controller with PSM and built in gate drivers
    • LTC3774: Dual output poly-phase step-down DC/DC controller with sub-mOhm DCR sensing, designed to drive DrMOS, no PSM

    Best regards,

    Mike

Reply
  • Hello Rafal,

    In the LTC3882 example circuit, phase 0 is the master and phase 1 is the slave. The slave phase has an internal current share error amplifier which adjusts the slave's duty cycle to ensure the inductors currents in the master and slave phases are balanced. During a load step up, the current in the slave phase may lag behind the master slightly. This is due to the delay in the slave's current share error amplifier circuit. A similar delay can be seen in the load step up on page 9 of the data sheet, 3rd row 2nd column.

    The long pulse seen in the example circuit after the load step up is due to the aggressive compensation. With slower compensation, this should not occur.

    Given that the LTC3882 is a voltage mode controller it will require an internal current share error amplifier for accurate current sharing as mentioned above. For most applications, the current share loop works well. If faster dynamic current sharing is required, then consider a  peak current mode controller. The current sharing of current mode controllers is inherently fast since the current sense signal of both phases are compared with the same ITH voltage which is the output of the error amplifier. They do not require a current share error amplifier. Here are a couple of dual phase, peak current mode controllers to consider:

    • LTC3880:dual output poly-phase step-down controller with PSM and built in gate drivers
    • LTC3774: Dual output poly-phase step-down DC/DC controller with sub-mOhm DCR sensing, designed to drive DrMOS, no PSM

    Best regards,

    Mike

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