I'm looking at LTspice macromodel's design example of LTC3882. It's a 2-phase single output design.
In constant load state inductors currents are equal, so the load sharing between phases works as expected.
However when I apply a load step, all additional current goes through one inductor. Second inductor's current increases slowly until it matches first inductor's current.
If I add even more current to step load, the second inductor may even skip a cycle instead of sharing a load, so one phase must be capable of delivering almost all current to the load.
Is that expected behavior of real device or a spice model issue?
Applied step load to the macromodel's example design:
Inductors currents not equally shared at step load (0.9 ms)