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ADP5056 - Not working in FPWM mode

Hi Team, 

We are designing an RF Board with ADRV9002. For powering the ADRV9002 , ADP5056 is used. Our design is exactly same as ADRV9002 EVK. The only difference is 5V input. Herewith i have attached the switch node waveform for Out1. The switch node waveform is not looks like proper PWM wave, is this a correct behavior? We have configured the converter in FPWM Mode.

All inductors, input capacitors, output capacitors and feedback resistor values are same as EVK(https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-adrv9002.html)

  

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  • Hi Selvaraj,

    Have you managed to debug this any further?

  • Hi Team, 

    The issue has been resolved. Due to insufficient input capacitor this happened. We have added 47uF capacitor near ADP5056 input pins, it is working properly now. 

  • That's interesting to hear. Thanks for the update, and glad you got to the bottom of it.

    We've had a similar problem with 3off of a new PCB we put together using the ADP5056 in FPWM mode, which had +1v8, +3v3 and +1v15 on channels 1-3 respectively, and our +1v8 CH1 waveform was similar to what you have posted - a couple of very high duty cycle pulses, then a lower duty cycle pulse, then skipping several pulses. The voltage ripple on this rail was terrible, and the very high duty cycle pulses hammered the +12v input rail from the bench supply during test. CH2 and CH3 worked exactly as expected, however.

    After much revisiting of the design calcs, and component choices, I couldn't identify any problems. The PCB layout was completely symmetrical between CH1 and CH2 on our PCB, so it didn't seem to be a layout issue.

    Components were almost identical in our design for CH1 and CH2 voltage and current choices, including input and output caps. So we swapped the feedback resistors over between CH1 and CH2, to put our 3v3 on CH1 and 1v8 on CH2 - kind of a last resort sanity check.  Having done this, the performance of both CH1 and CH2 were as they should have been from the start.

    It's a head scratcher, for sure, but I will revisit our choices for input capacitance, in light of your update. Thanks!

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  • That's interesting to hear. Thanks for the update, and glad you got to the bottom of it.

    We've had a similar problem with 3off of a new PCB we put together using the ADP5056 in FPWM mode, which had +1v8, +3v3 and +1v15 on channels 1-3 respectively, and our +1v8 CH1 waveform was similar to what you have posted - a couple of very high duty cycle pulses, then a lower duty cycle pulse, then skipping several pulses. The voltage ripple on this rail was terrible, and the very high duty cycle pulses hammered the +12v input rail from the bench supply during test. CH2 and CH3 worked exactly as expected, however.

    After much revisiting of the design calcs, and component choices, I couldn't identify any problems. The PCB layout was completely symmetrical between CH1 and CH2 on our PCB, so it didn't seem to be a layout issue.

    Components were almost identical in our design for CH1 and CH2 voltage and current choices, including input and output caps. So we swapped the feedback resistors over between CH1 and CH2, to put our 3v3 on CH1 and 1v8 on CH2 - kind of a last resort sanity check.  Having done this, the performance of both CH1 and CH2 were as they should have been from the start.

    It's a head scratcher, for sure, but I will revisit our choices for input capacitance, in light of your update. Thanks!

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