LTM4656 VOUT 2 step rise

Question

I am verifying LTM4656 (12V IN 24V OUT) with LTSpice, but after Vout rises to Vin, it stops rising once and then rises again. 
 Is this the following recognition? (1) SW stops until VOUT ≒ VIN-1V, and the H side FET is always ON. (Through state from VIN to VOUT) 
 (2) When the SS terminal rises and becomes above the FB terminal, PWM is performed and VOUT rises further. 
 Due to the above operating specifications, it will rise by two steps. 
 Is my perception correct? 
 4656_2.asc

ADIApproved · Accepted Answer

Hi UBOTI, 
 Looking at the block diagram in the datasheet, the input to the boost is actually the BVin. The first ramp is the BVIN rising to Vin level to avoid inrush and the second ramp is the boost from Vin to Vout. Attached is my simulation in LTspice where the red waveform is the BVin:)

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LTM4656 VOUT 2 step rise