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LT8610AB PGOOD de-bounce capacitor


We are using the LT8610AB as a primary 5V regulator with its PG open-drain output used to enable/disable downstream regulators. This is done via a 100kOhm pull-up resistor (R2) to the regulators 5V output.

During testing we have found that the addition of a 470nF ceramic capacitor (C3) effectively helps prevent any nuisance PG resets caused by glitches that may appear on the 5V rail.

So I am wondering if this is acceptable considering that there are no maximum energy limits specified in the datasheet for the PGOOD open-drain?


  • The above circuit will sink (1/2*C*V^2) = ~5.9 uJ into PG. Duty cycle will be very low.
  • Other low drain current nmos transistors typically specify max drain ratings at 3A for 300us (or 900uC) (e.g. which is significantly higher than 5.9 uJ

Thanks for any updates.