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I have a few questions about some equations included in a datasheet of LT8705 buck-boost controller.
1) on the page 22, there is an equation for Rsense(max, boost). In an equation (in denumerator) is a Vout(min) included, but should be there Vout(max) instead of Vout(min), because maximum duty cycle (limit example) of a boost region is achieved at Vin(min) and Vout(max)?
2) on the page 24 there are two equations: L(min2,boost) and L(min1,buck). This two equations include some additionals, needed that subharmonic oscillations can't occur. Can you please explain how are this two equations are derived? I also found AN19-1 (LT1070 Design manual) note with more detailed explained subharmonic oscillation theory (on page 72) and there is Sx slope mentioned which is added to the S1 slope (that equals Vin/L). I'm not sure if this feature work in the completly same way also in the LT8705 controller, because in the LT8705 datasheet is also a substracting of slope S2 mentioned. I think that this compensating slope is not the same for a boost and a buck mode and is not fixed but is changing all the time, is that right? However, it would be nice to understand how this two equations in datasheet are derived.
3) L(min1,buck) equation (LT8705 datasheet, page 24) has Vout(max) included in numerator. In the datasheet of the LT8708 there is L(min2,buck) equation on page 33, which has Vout(min) in numerator. Should be Vout(min) also in numerator of  L(min1,buck) equation of the  LT8705?
4) is there any reason why is no important an adequate load current in the buck region when searching for an inductor value? Under Inductor Selection section there is only equation for minimum inductor needed in boost region included, equation for minimal inductance needed in buck region is only under Subharmonic oscilation region.
5) calculation of needed output capacitance (for a given voltage ripple) is easy to understand for both - buck and boost region. Also there is easy to calculate a needed input capacitance in buck mode. But I'm not sure how to calculate a minimum capacitance needed in boost mode.Can you suggest how to find it?
6) power losses on M1 and M3 transistor are largely caused by switching losses, so in a datasheet, a transistors with a lower Crss capacitance are suggested. In the LT8708 datasheet is mentioned that also Coss capacitance is important. Can I assume that transistor with a lower Crss capacitance has also a lower Coss capacitance or is any other explanation why only Crss capacitance is mentioned as important parameter in a LT8705 datasheet?

Many thanks!