I am having 5V Adapter,Battery charger,Battery, load switch and Buck Boost after load switch and uC.
I am designing with ADM706SAR, I am having some design issues:
I am using the PFI and PFO for power fail.I need to shut down my DC to DC regulator(buck-boost) when the battery is low. I have kept the PFI threshold at 3.2 volts.When input voltage goes below, the PFO is activated and uC gets an interrupt.It will close its activities and stay idle.
However I need to shut down the DC to DC also,Earlier I have planned for delayed PFO to the DC to DC's Shut down pin however that makes the Reset IC to be provided with unregulated battery output.
In that case the VCC will be unregulated(4.8V from Charger and 3.2 volts from battery) and my RESET signal might get affected.
As the battery will be 3.0 and DC to DC will be in shut down phase, when the charger will be applied the PFO will be high as the input changes from 3.0 to 4.8V however the RESET will not be generated as it requires input to reach 2.85V(this is not possible with unregulated connection of Li-ion).
I am attaching my schematic.
I think there is no open drain output available with PFI facility in supervisory selection and hence I need to put a Zener over RESET as it will be pulled to 4.8V in case of Charger.
Pls guide me.
i think i understand the problem better now.
I presume the idea behind disable the buck-boost is to aviod battery discharge?
Can the PFO triggers your uC into low power mode? if so, combine with the LTC3113's burst mode, the total power loss may be low.
this will allow the battery to be discharged in a much slower rate.
if this is not a viable solution, i suggest break the 706 into two parts.
ADCMP354 or ADCMP356 placed in front of the buck-boost acting as PFI, generate interupt signal to uC and combined with RC to disable DC/DC.
one of the follwoing voltge supervisor (200ms reset delay + 1.6s watchdog), placed after the DC/DC to monitor the uC.
the total solution adds no more cost.