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ADP2120 Recommended for New Designs
The ADP2119 / ADP2120 are low quiescent current, synchronous, step-down DC-to -DC regulators in a compact 3mm x3mm LFCSP_WD package. Both Devices use current...
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ADP2120 on Analog.com

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ADP2120 max Cout



		

			

									
					    ak1000
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Apr 19, 2012 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hello,
    
 
    What is the max recommended output capacitance allowed on the ADP2120?  The datasheet specifies a min of 22uF, but can another 100uF or 200uF cap be added to this Cout distributed elsewhere on a board?  At what output capacitance woudld the device enter hiccop mode?
    
 
    Thanks,
    
 
    Ali
    
									
			        
		
    

				
				
		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    


	
    
		
	
    















    
	
    
	
    
					



			


				
	









	
      
	

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      •  Analog Employees  
      
            
			                            
                        
                on Apr 24, 2012 1:10 AM
            
            
					
      
	
      

		
		
      
					
      To prevent the device to enter hiccup mode you need to guaratee that your start-up current requirement does not force the device to hits its current limit.
      
 
      Current limit is set to 2A
      
 
      Current at start-up < Ilimit =  0.7 * Cout* Vout / Tss
      
 
      Tss = 850us at 1.2Mhz or 1.7ms at 600Khz, this is the preset soft start timer
      
 
      I use 0.7 coefficient to reflext a 30% increase in current due to ripple current in the inductor
      
 
      So for a 1.8V output
      
 
      Coutmax < 2A * 850us / 1.8V / 0.7 = 1300uF
      
 
      If in adition to the cap requiring current your load is also asking the full 1A then
      
 
      Coutmax < 1A * 850us / 1.8V / 0.7 = 670uF
      
 
      All this assumes the loop is stable with the large output cap. You may want to consider entering your requirements into the ADP2120 ADIsimPower tool and set it for a stringent ripple and transient requirement, the tool will double check stability and start-up and suggest the size capacitor that meets your needs.
      
 
      You can also slow down the start-up timer by using an external ramp on the TRK pin. You can do that with a RC network connected to Vin that guarantees the TRK pin ramps to 0.6V slower than the preset timer.
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
						
						
				
				
		
		
      
			
		
      
	
      

      

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