LTC3350: Discharge/charge current limitations in LTSpice Simulation different than calculated

Hi,

After dimensioning our LTC3350 design, we started the verification phase. One step is simulating it with LTSpice, where we observe an unexpected behaviour:

We have choosen Rsnsc to be 1.5 mOhm. This leads - according to datasheet - to an Ichg(max) of

32 mV / 1.5 mOhm = 21.33 A, which can be considered as charge current.

The incuctor current - considered as maximum discharge current - can be calculated as Ipeak = 58 mV / Rsnsc = 38.66 A

Now when we simulate the design, we observe a limit of 16 A (neither 38.66 A nor 21.3 A) while discharging.

Changing Inductivity, Cc capacitor, Compensation, Icap-filtering adding and removing and even output voltage reduction does not change anything regarding the discharge current limit. It stays exactly constand, as if the Rsnsc had higher resistance. But if we reduce the Rsnsc to 1 mOhm, the limitation increases to ~22 A. Further reducing of Rsnsc brings the design in our range where it works, hence it's not limited due to anything else. But just changing Rsnsc without knowing what's wrong and later ending with another problem is not how we work.

The charge current is also limited otherwise than expected: to 16.5 A instead of 21.33 A. (Independent of anything, even when no load is connected and independent whether or not the input shunt resistor Rsnsi is reduced.)

We use LTSpice XVII(x64) (17.0.27.0). May the LTC3350 spice model be wrong somehow? (We only want to share the complete schematic with Analog devices, so if you need it to reproduce, let me know where to send.)

Here's the behaviour with 1 mOhm (R6 is Rsnsc):

Thank you for your help.

Best regards,

Michael

Parents
  • Hi,

    In between, I have verified the demo 3350.asc spice design and observe the exact same behaviour: (We just changed Csupercap from 1 mF to 5 mF to avoid charge current limitting due to input current limit.)

    The charge current is about 1.3 times lower than calculated with the Rsnsc of 6 mOhm
    We would expect a max charge current of: 0.032 V / 0.006 Ohm = 5.33 A.

    But the charge current - when simulated and configured Csupercap to 5 mF - is limited to ~4.1 A.

    Here's are design and simulation result:

  • 0
    •  Analog Employees 
    on Jun 11, 2021 1:32 PM in reply to mum

    Hello,

    from your schematic you have 16mOhm between VSNSP and VSNSN, this sets the overall(=system) current limit towards (32mV/16mOhm)=2A. The current for the output load (12V/10Ohm=1.2A) is prioritized versus the charge current, hence charging current will be reduced further on. Have you checked this? The available charge current depends on the available charge input power: (0.8A*12V)/vcap.

    Please check your schematic to observe the current distribution between system load and charging circuitry.

  • Hi Markus,

    Thank you for your reply.

    Yes, the input shunt resistor limits the overall current. But that's not the issue in the shared design, neither in our design (my request from yesterday). As I mentioned we did also try this.

    To simplify, I just changed the input shunt (R5) to 1 mOhm in the default design (as well as again Csupercap to 5 mF).

    Exact same behaviour:

    To simply reproduce, here's this ltspice design: 7382.ltc3350_wrong_rsnsc_limitting.asc

  • 0
    •  Analog Employees 
    on Jun 11, 2021 2:56 PM in reply to mum

    Hello,

    I just modified the standard example from LTSpice and run the simulation twice: Once with 16mOhm (blue curves) as input sense and 2nd run with 1mOhm (green curves)as input sense.

    It looks different to your result as it hits the expected limit of 5.33A if the input current limit features the 1mOhm.

    And Icharge is reduced if current limit features the 16mOhm shunt as there is not enough current allowed to deliver System load and mx charging current in parallel.

    I do not know if there was a recent change in the LTC3350 model or in the LTSpice program, I think I have made an update last week

  • Dear Markus,

    Thank you for your examination. This is interesting (and annoying as well, since we wasted much time).

    Can you please compare your version with our version (above in my first post)?

    I assumed we work with latest version, because LTSpice updated when we started it.

    Best regards,

    Michael

    Update:

    Just updated installation (same version), then manually deleted Documents folder, then completely uninstalled LTSpice and reinstalled it (still same version). => Absolutely no change in results.

    I think it makes sense when you run the exact same design (R5=1mOhm, Csupercap=5mF) and compare the results (I shared it in my last post).

    Thank you.

    Update2:

    Installed LTSpice on a completely new installed additional computer and proceeded the simulation; same result (here with Csupercap=1mF, but same result with 5mF):

    It looks like you have a newer/different version of LTSpice or the LTC3350 spice model than public available/most recent.

    Update 3: Issue is the latest version of LTSpice:

    We have a Notebook where LTSpice is installed but a relatively old Version (From aug 23 2019), so we disconnected the network connection to prevent it from updating. Running the simulation shows a correct charge current. The latest changelog in LTSpice contains

    "05/09/21 LTC3350 Corrected Output Feedback (OUTFB) voltage loop"

    I suspect this change ended in the wrong behaviour of the charge current.

    Will you report this bug or should we do it?

    Here is the result with the very old LTSpice version:

Reply
  • Dear Markus,

    Thank you for your examination. This is interesting (and annoying as well, since we wasted much time).

    Can you please compare your version with our version (above in my first post)?

    I assumed we work with latest version, because LTSpice updated when we started it.

    Best regards,

    Michael

    Update:

    Just updated installation (same version), then manually deleted Documents folder, then completely uninstalled LTSpice and reinstalled it (still same version). => Absolutely no change in results.

    I think it makes sense when you run the exact same design (R5=1mOhm, Csupercap=5mF) and compare the results (I shared it in my last post).

    Thank you.

    Update2:

    Installed LTSpice on a completely new installed additional computer and proceeded the simulation; same result (here with Csupercap=1mF, but same result with 5mF):

    It looks like you have a newer/different version of LTSpice or the LTC3350 spice model than public available/most recent.

    Update 3: Issue is the latest version of LTSpice:

    We have a Notebook where LTSpice is installed but a relatively old Version (From aug 23 2019), so we disconnected the network connection to prevent it from updating. Running the simulation shows a correct charge current. The latest changelog in LTSpice contains

    "05/09/21 LTC3350 Corrected Output Feedback (OUTFB) voltage loop"

    I suspect this change ended in the wrong behaviour of the charge current.

    Will you report this bug or should we do it?

    Here is the result with the very old LTSpice version:

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