I am using the LTC7124 and I am in the process of designing the loop compensation filter. A key piece of information to do that is knowing the output resistance of the error amplifier (to calculate the dominant pole).
With that I can figure out all the other parameters of interest, although if there is a full description of the internal architecture it would be very helpful (along the lines of the excellent AN-76 that I used many years ago to guide me when I was designing power supplies with the LTC1735).
The internal loop architecture details are clearly at least somewhat different to the OPTI-LOOP that was used in the LTC1735 and some clarity would be of great help.
