I'm trying to power an AD8052 opamp with a +/- 5V power supply. The positive +5V supply for the op amp is generated by an LM317 voltage regulator (the input is a 9V battery). While, the negative -5V supply is generated by the ADM660 whose input is the LM317's +5V output. The ADM660 negative output directly powers the negative supply of the AD8052 op amp (see schematic below).
Now, when I view the ADM660 output on a scope i get a pretty stable -5V voltage. However, if I probe the +5V input voltage I get quite large switching noise (order of 150mV and frequency is approximately 44khz). If I disconnect the ADM660, the noise on the +5V line disappears. The 10uF capacitors are tantalum low ESR as recommended by the datasheet. Placing a large electrolytic cap between the +V input and GND of the ADM660 actually reduces the noise a bit but it is still significant.
1) Is this a normal phenomena with those kind of switch capacitor voltage inverters or am I doing something wrong?
2) What can be done to reduce the noise amplitude?
3) If bypass caps are the way to go, what values would you recommend (I already have three caps on the +5V line which are placed about 2cm from the ADM660) ?
If it makes any difference, the board is a 4 layer one and the +5V input to the ADM660 is routed through a via to a +5V plane.
Thank you in advance,
This is a common question that I think we can help you with. Consider the two phases of the inverting charge pump operation:
Phase 1: C1 (the flying cap, which is C38 on your schematic) is applied in parallel to the input cap (C35 on your schematic). So C1 charges to Vin.
Phase 2: C1 polarity is reversed and C1 is applied in parallel to Cout (C31 on your schematic). So Cout charges to -Vin.
During Phase 1, C1 must be charged from the input caps (C38). And if those input caps don't have a good charge path from their source (LM317 Vout), then the load on them that C1 represents (do to the change in input capacitance-->C1||Cin) will cause a drop in the input voltage during phase 1. If Cin=1uF and C1=10uF, then the new input capacitance is basically increased by 10x during Phase 1--requiring a lot of current and time to recharge Cin during Phase 1. Does all that make sense?
There are a couple of easy fixes:
1. Change the switching frequency to 120kHz and decrease the value of C1 to 2.2uF. This will dramatically reduce the load that C1 places on Cin.
2. Add more input cap. I think the Cin is far too low (its only about 1.1uF now). Try 10uF or so. Then when C1 is placed in parallel with Cin, the change in input capacitance will be much smaller.
3. Change to ceramic capacitors. Unless your application requires the use of tantalums, I highly recommend switching to ceramics. The ceramic capacitors have a much lower ESR (then both tantalums and electrolytics) which will help tremendously in charge pump applications. I would recommend switching Cin, C1, and Cout to ceramics.
I hope that helps. Let us know if you are still having trouble or if you need anything else.