__Application and Circuit Description__

We are using the LT4363-2 as an overvoltage and overcurrent protector in our products.

The design calculation and simulated values do not agree and hence want to confirm whether my calculations are correct. I suspect there is an error in my calculation since the simulated and experimental results closely agree. I also wish to clarify some data sheet specifications.

Design Parameters.

Output voltage = Vout = 35.7V

Overvoltage = Vov = 38.25V

Undervoltage = Vuv = 8.5V

Overcurrent = Ioc = 5A

The required component values were calculated based on the above design parameters.

Please refer the attached Mathematica worksheet and the LTspice circuit diagram.

For the calculation of the fault time, it is required to know the timer current I_{TMR} through the timing capacitor C_{TMR}. Based on the data sheet specifications the equation for the I_{TMR} versus V_{DS} during the overvoltage condition is given by, please refer the attached calculation notes.

I_{TMR} = 0.61745 V_{DS} + 3.69 (Note here V_{DS} is in Volts and I_{TMR} is in µA)

When the input voltage, V_{CC}, is between 35.7V and 38.25V LT3643-2 will be in retry mode.

For the case when V_{CC} = 38V, V_{CC} – V_{OUT} = 38V – 35.7V = 2.3V.

Since the load current is negligible V_{CC} – V_{OUT} = V_{D} – V_{S} = V_{DS} = 2.3V.

Based on this V_{DS} of 2.3V the calculated I_{TMR} is 5.11µA.

For a 1µF timing capacitor the fault time, t_{FLT} can be calculated to be 151ms.

This is the time taken for the timer capacitor voltage, V_{TMR}, to rise from 0.5V to 1.275V.

Again please refer the attached calculation notes.

I have simulated the above design using LTspice and the following are the results.

Following do not agree with the calculation.

Simulated I_{TMR} = 3.17µA during t_{FLT.}

Simulated t_{FLT}, V_{TMR}, to rise from 0.5V to 1.275V = 243ms.

Calculated I_{TMR} = 5.11µA during t_{FLT.}

Calculated t_{FLT}, V_{TMR}, to rise from 0.5V to 1.275V = 151ms.

Implementation results.

Measured t_{FLT}, V_{TMR}, to rise from 0.5V to 1.275V = 230ms.PDFPDFLT4363IMS-2 ADI Engineer Zone.asc

Engineer Zone Questions.

- Based on the equation for I
_{TMR}it cannot go below 3.69µA during an overvoltage condition. Hence why does the simulation give a result of 3.17µA.

- According to the data sheet of LT4363, Revision F on page 11, once V
_{TMR}reaches a voltage of 1.275V the timer current I_{TMR}is set to a fixed value 6µA. But the typical value of I_{TMR}is 5µA as specified on page 4. The simulation also verifies that the I_{TMR }5µA as V_{TMR }rises from 1.275 to 1.375V. Which is the correct fixed typical value for I_{TMR}.

- According to the data sheet of LT4363, on page 12, during the overcurrent condition I
_{TMR}linearly rises form 8µA when V_{DS}is 0.5V to 260µA when V_{DS}is 80V. But on the graph Overcurrent TMR Current vs (V_{CC}– V_{OUT}) plot, on page 6, I_{TMR}does not reach 260µA when V_{DS}is 80V. But the typical value of I_{TMR}is specified as 250µA when V_{DS}is 80V on page 4.

Note LT4356, a different but similar device, has an I_{TMR}of 260µA as its typical value.

- The design example on page 17 of the data sheet has an I
_{TMR}of 45.5µA during an overcurrent event with an V_{CC}of 14V. How was the above value determined?

Based on a similar calculation during the overcurrent condition the I_{TMR}equation is given by:

(Note here V_{DS}is in Volts and I_{TMR}is in µA)

I_{TMR}= 3.17 V_{DS}+ 6.42 = 50.8 µA If I_{TMR}260µA when V_{DS}is 80V

or

I_{TMR}= 3.04 V_{DS}+ 6.48 = 49.1 µA If I_{TMR}250µA when V_{DS}is 80V

Which is the correct typical value to use?

Thanks

Diva