ADM1278 Hot Swap Designer by Spreadsheet tool

Dear Supporter,

I used ADM1278_HotSwapDesigner.xlsm to design eFUSE for load condition below:

- Imax = 187.67A

- OCP = 234.6A

- MOSFET: NTMFS0D9N03CGT1G

- Rsense: 0.5mOhm/3W

OCP condition only happen during the short time (200us). How to input above data to ADM1278_HotSwapDesigner.xlsm to avoid over design on FET and Rsense?

Thank you.

Parents
  • +1
    •  Analog Employees 
    on Apr 13, 2021 9:26 PM

    Hello,

        The ADM1278 with the NTMFS0D9N03CGT1G FET should work as an ECB at 235A. The design spreadsheet will help you design a circuit that is robust across all conditions, so consider its limitations carefully. There are several important considerations.

    1) To keep the FETs cool during operation you will need at least 7 in parallel to maintain I^2 x Rdson < 1W per FET.

    2) The CB threshold is nominally at Rsense=20mV, so you want Rsense <= 85uohm. You will need 6 sense resistors in parallel at 500uohm each.

    3) You need to set the PSET limit to achieve the 1ms line in the SOA diagram. Then set your timer <=1ms. ISET = 235A.

    4) You did not specify Cload, but you need to consider startup very carefully, since it is the most stressful time for the FETs. Limit inrush current such that Vds x Iinrush < PSET and Iinrush < ISTART/2. Use a capacitor on the FET gates to slow dv/dt and limit inrush current to the load. But also be aware that too much gate capacitance will slow the response to starting into a short circuit, which can cause FET damage during a fault condition.

    5) Ambient temperature affects how much headroom your thermal design has. Airflow (>200LFM) and layout (1 sq inch copper per FET) also have significant effects. Make sure you understand the thermal design of your system.

    6) The NTMFS0D9 FET is pretty good, but the NTMFS0D55 is much better. Consider switching.

        Take a look at this document for some additional commentary.

    www.analog.com/.../AN-1338.pdf

    Thanks!

      Nathan

  • ADM1278_HotSwapDesigner_Hung.zip

    I attached my spreadsheet. Hope you help to review.

    Thank you so much.

  • +1
    •  Analog Employees 
    on Apr 21, 2021 11:25 PM in reply to HungDang

    Hi Hung,

        You need to adjust two things (see image). First, the TC Temp is the maximum junction temperature at which you expect your FETs to operate (including ambient+board+self heating). I used 120C, which is very hot, but for a 175C max, maybe OK. The FET will not operate above this temperature.

        Second, I adjusted the Tc coefficient. This is the value that you get from the FET datasheet, figure 5 (Rdson vs temperature). at 125C it is about 1.4, and since we know that our FET will operate below 104C we are safe.

Reply
  • +1
    •  Analog Employees 
    on Apr 21, 2021 11:25 PM in reply to HungDang

    Hi Hung,

        You need to adjust two things (see image). First, the TC Temp is the maximum junction temperature at which you expect your FETs to operate (including ambient+board+self heating). I used 120C, which is very hot, but for a 175C max, maybe OK. The FET will not operate above this temperature.

        Second, I adjusted the Tc coefficient. This is the value that you get from the FET datasheet, figure 5 (Rdson vs temperature). at 125C it is about 1.4, and since we know that our FET will operate below 104C we are safe.

Children
No Data