adp2323 emi and snubber design

I am using the ADP2323 for one of our designs and i can see low amplitude spikes (10mVpp) at the switching frequency on some board outputs (on clock signals ). I was wondering if an RC snubber circuit at the output MOSFET could help reduce these spikes leaking into sensitive sections of the board.

I see that the ADP2323 evaluation board has provision for RC snubber (R6, C11 and R20, C14) but is not populated. Is there any reference for optimal RC values that can be calculated for APD2323 ? I would appreciate any inputs.

Thanks.

AB

  • 0
    •  Analog Employees 
    on Oct 18, 2014 5:03 AM

    AB,

    if I understand correctly you see the 10mV noise on the output of the clock generator correct? How are you measuring this noise? I want to make sure it is not just picked up by the scope probe rather than actually being in the signal. Do you see that noise on the high level only of the clock or also on the low level?

    Can you post a picture of the scope measurement and maybe even a picture of your set-up while measuring?

    Is it a differential clock signal or single ended?

    We need to differentiate between conducted noise versus radiated noise. Conducted noise is handled through filtering between the power supply and the clock circuit.

    Radiated noise (actual EMI) would need to be addressed through layout or shielding. If your layout is not optimal then it's possible that there is some coupling between the circuits. But 10mV on a clock signal seem high for radiated coupling.

    The snubber would not improve conducted noise much and may only improve radiated noise if the layout is already well done.

    LucaV

  • Thanks very much for your response Luca V. The problem seems to occur from one of the switcher output of the ADP2323. The layout is good with enough power supply filtering. So it is hard to believe this is conducted noise. The other problem is that this board is a Revision-2, and Revision-1 worked great with the same ADP2323 circuit. The main thing that changed was that we did not use analog-digital ground plane separation is Revision-2, while we did use it for Revision-1. So i am not sure if this has anything to do with the noise spikes.

    I use a 12V input and generate 5.6V and 3.6V from ADP2323. We use an ADC on this board which does not even use this ADP2323 as its power source. It is powered from a separate 3.3V switcher rail, which is regulated etc. I see amplitude spikes on the sampled ADC IQ data (chipscope snapshot attached).  The amplitude spike occur at the ADP2323 switching speed (1MHz), and very small in amplitude. I have also attached the ADP2323 schematic, which is borrowed from the ADI-FMCOMMS1-EBZ designs.

    To debug the issue, i have tried beefing up the supply capacitors.. did not help. Then i disabled the ADP2323, bypassed the circuit completely. I supplied a 5.6V and 3.6V switcher DC input from an external circuit (different switcher part). The problem was solved, and the spikes went away ! The problem is primarily with the 5.6V rail of the ADP2323. If i use the 3.6V rail from ADP2323, i do not see any issues. Other than the analog-digital grounding part, the power rails are laid out the same way on the Revision-2 boards.

  • 0
    •  Analog Employees 
    on Oct 22, 2014 4:25 AM

    If there is enough GND layer around the part then having a single GND for the system should be ok but... the key for power supply designs to guarantee they do not inject noise into the GND plane is to connect the 3 main high current ground paths of each channel together and on the same layer.

    In you case:

    Q1GND, C24 and C23 GND side need to be very close together and ideally on the same layer.

    same is valid for the other channel

    Q2GND, C26 and C18 GND side need to be very close together and ideally on the same layer

    Also the drain of Q1 and Q2 need to be very close to the respective SW pins.

    If you post or email me the layout I can take a look.

    Another thing to scrutinize is the inductor L1 to make sure if has good shielding. Not all shielded inductors performs the same. What's the PN of the one you are using?

    Best Regards,

    LucaV

  • Thanks LucaV,

    I think the layout precautions are taken as you mentioned. But i will try to send you some snapshots of the layout. It will be tough to send the complete board layout. Is there an email ID i can use to send you the design ?

    Also i am using XFL4020-472 Coilcraft at 4.7uH. I see that an XAL series is recommended for higher Isat with minor penalty on DCR. Our continuous current draw at 5.6V is 1.5A. I can try switching to the XAL series. What would you recommend ?

    Thanks again,

    AB

  • 0
    •  Analog Employees 
    on Oct 22, 2014 10:22 PM

    The XFL typically has lower core loss and most likely also lower shielding.

    They are typically both pretty good though, but it's worth trying the change.

    Not sure what to tell you otherwise, the layout change may be small enough to accentuate the noise.

    LucaV