Does Analog Devices have any data on the NSEU susceptibility of the ADM106x product line? Specifically what is the cross-section size of the registers? Are there any parity or error correction bits provided for the registers to flag when an upset occurred?
Hi Scott,
based on wafer fabrication data available here:
Analog Devices Wafer Fabrication Data
ADM1062 uses Process Technology of 0.5um CMOS
So it's very robust against single event upset
Ren