ADM1064 glitching on power up

Depending on the brownout profile, you could increase the capacitor value on  VCAP pin, i.e. to 68uF to 100uF to help it ride through the supply brownout.

But in case like this the best thing to do is to design the circuit to avoid the brownout.

this can be done by improving the step/load response of the DC/DC before the switch (increase look bandwidth or increase load cap). It may also be achieved by slow down the PowerFET switch, depending on the drive type, place a capacitor or RC on the gate.

Ren

Hi Ian,

It should be okay to use a ceramic capacitor on VDDCAP (I'll still confirm it with design). You should use at-least use 10uF for VDDCAP. How long does the supplies dip for?

Could you please scope the VDDCAP pin  to confirm VDDCAP supply is dropping out when the input supplies dip.

Since the VDDCAP LDO arbitrator should prevent that from happening, the part can power from either supply (5 or 3.3) or the VDDCAP, so all three have to go down for a brownout.

Regards,

Opal

I've confirmed, it should be okay using ceramic capacitor, since it has lower ESR.

Hi,

Sorry for the delay in replying, did not get notification of a new post.

I'll measure the voltage on VDDCAP tomorrow, when I get a board back from rework/repair.

The initial glitch was observed when one of the control outputs to an active high enable of a converter, glitched/floated, twice during powerup, for 2ms before starting when required.

My processor card has 8 converters, creating 12 power rails, a challenge for ordered power-up.

Good to know the ceramic capacitor will be OK, saves changing to a Tantalum.

Will test tomorrow and post results and some scope plots.

Thanks for the help so far.

Ian

Hi Ian,

I just want to confirm the sequence of events that's happening.

based on my understanding:

once the power is powered up, ADM1064 powers up first.

then ADM1064 turns on some other supply, which has caused some inrush current and in turn caused the supply on ADM1064 to brownout, and the above events looped a few times before the system is stable.

is this what you are seeing?

Ren

Hi,

Sorry for the long delay in replying, other issues needed to be addressed first.

I did some measurements last night, it looks like my glitch is caused by the ADM1064 when it loads it's configuration from EEPROM. Two of my converters, a Maxim MAX8686 and TI TPS51116, have FET controlled enables, they are driven low to turn off the converter. When the ADM1064 powers up and configures, the outputs are high impedance, the FET is off and the converters self start. When the ADM1064 configures, it jumps to the first state and disables the converters, then sequences them. A picture always helps.

The 1.8V converter, shown on the yellow trace, should be switched on last, which does eventually happen. The small blip is 500us wide, the time taken for the ADM1064 to configure.

The switched +5V is from another power manager, on the host card, it is not controlled by the ADM1064 (it's a Lattice ISPPAC-POWR1014A).

We will look at changing the enable to the converters to get through the power up stage without false starts.

Hi Ian,

I guess it's true that a picture is worth a thousand words.

i initially thought the glitch is negative and happens as these supplies are powering up, now i understand it.

It's worth noting the behavior of the PDO outputs during power up, as described in the datasheet:

DEFAULT OUTPUT CONFIGURATION

All of the internal registers in an unprogrammed ADM1066 device from the factory are set to 0. Because of this, the PDOx pins are pulled to GND by a weak (20 kΩ) on-chip pull-down resistor.

As the input supply to the ADM1066 ramps up on VPx or VH, all PDOx pins behave as follows:

• Input supply = 0 V to 1.2 V. The PDOs are high impedance.

• Input supply = 1.2 V to 2.7 V. The PDOs are pulled to GND by a weak (20 kΩ) on-chip pull-down resistor.

• Supply > 2.7 V. Factory-programmed devices continue to pull all PDOs to GND by a weak (20 kΩ) on-chip pull-down resistor. Programmed devices download current EEPROM configuration data, and the programmed setup is latched. The PDO then goes to the state demanded by the configuration. This provide

is the 20k pull down too weak to keep these converters off?

could you power the ADM106x from the 5V backplane?

Ren

Hello,

Sorry for the long delay in replying. I changed the circuit to drive the enable pins of the two converters directly, by removing the 2N7000 FETs and it now works as expected.

The 20K pull-down was sufficient to hold off the startup circuitry until the ADM1064 configured. THis also helped fix an intermittent startup problem with one of the video chips.

Ian