LTM4671 SS pin


I'm a DFAE in Japan. Our customer evaluates LTM4671 on his trial pcb. The start up time of 5A ch is too long for him and he deletes the capacitor between TRACK/SS pin and GND. I think it possible because there is an internal pull-up. Is it correct?



  • +1
    •  Analog Employees 
    on Feb 22, 2021 9:23 PM

    Hello Hiroyuki san,

    For the 5A channels (Vout1, Vout2) from the EC table the start-up time is 5ms with 10nF SS cap (12Vin 1.5Vout, 100uF Cout). 

    Internally there is 1.4uA internal pull up current source on SS and internal reference tracks the SS pin voltage up to 0.6V, so feedback voltage should be following the Track/SS pin voltage, which you can verify. If there is another current (sink) on the node it will slow down the SS voltage, I believe this can help for more information on the issue. Also note that for no SS cap the internal SS rise time should be ~1us (1.5us max) from its EC table.




  • Hello Sam,

    Thank you very much for your reply. I saw the EC table but didn't see the internal SS rise time being 1us without SS cap.