We are trying to use the EN input of LT8336 to turn off output voltage, but we still see 12.2V out with 12.6V input voltage and EN/UVLO 0V. Is this expected behavior or is there something wrong with our design/board?
the LT8336 ia synchronous Boost regulator, hence it 'features' a DC path from input to output, even when part is in shutdown and even when the catch diode is replaced by a FET. Reason is the parasitic body diode of the synchronous FET.
If this behaviour is undesired you would need a Boost with explicit 'output disconnect' feature (LTC3121, but different VIn, IOUT performance).
2nd option would be the SEPIC topology, which offers a coupling cap and has therefore no DC path from input to output.
as the body diode of the top-FET would 'see' this 0.5A load current with a certain drop (much higher than normal diodes) power loss in the LT8336 might get large with possible bad consequences for the LT8336. I would not allow this scenario to the application or at least limit the load current during shutdown to smaller (and tested) values.
to avoid this additional work I would recommend to use a DC/DC regulator in a SEPIC topology, this requires a 2nd (or coupled inductor), but features a 'no DC path' between input and output. Hence you have a full shutdown without any additional load switch.
LT8330, LT8362 or LT8365 feature your voltage and current range, low IQ and AEC-Q100 qual.