LTM4651 simulation issue

Hi Alexey,

It looks like Fset resistor should be tied to -Vout, not GND.  Also why do you have a 50 load on Extvcc?

I'll get back on adding the 2974 DAC. Do you want +/-5% control of Vout?

Mike

Hi Alexey

I have modified your LTspice file.  See attached.

The 2974 DAC can be connected to a PNP transistor that adds/subtracts current to the ISET node. There's a pre-bias current that needs to be sourced from the PNP collector.  It adds to the ISET current from the LTM4651.  The ISET resistor is chosen such that Vout/(prebias+ISET).  In the example file, the prebias current is 10uA.  200k*60uA=12V.  With prebias current nominally set to 10uA, this means that you can add another 10uA or take away 10uA, which allows this current go from 0uA to 20uA. The simulation is set up for approx +/-5% of Vout margin.

The 2974 DAC configuration bits needs to be set to high range and non-inverting.  Soft-connect will work if the DAC is set to high range.

Mike

4651-12Vout_mtp.asc

Hi Mike

Thanks for your help. It was my mistake that Fset was connected not to -Vout.

50R at Extvcc is according to the datasheet (Para: INTVcc and EXTVcc Connection)

The last example regarding to margin -Vout works as I expected to get.
Thank you again!

Alexey

Hi Mike

Thanks for your help. It was my mistake that Fset was connected not to -Vout.

50R at Extvcc is according to the datasheet (Para: INTVcc and EXTVcc Connection)

The last example regarding to margin -Vout works as I expected to get.
Thank you again!

Alexey