Reducing the feedback loop bandwidth of the ADP7112 seems not to work in LTSpice

Question

Hello, 
 
 I have a noisy circuit that I needs to be isolated from the main supply. Space constraints make a filter in the kilohertz range not suitable for our design. 
 The noisy part can easily live with some 100 mVpp of ripple or oscillations on its own supply, though. So the idea is to use a LDO and simply reduce its feedback loop bandwidth. 
 This does work well in several simulations with ICs from different vendors. 
 Unfortunately it does not seem to work in LTSPice with the ADP7112 (which is preferred because of its small size in a WLSCP package). Don't know if this the ICs real behavior or just an artifact in the simulation or if the feedback loop bandwidth is nor really part of the model. If I change the feedback loop bandwidth by adjusting the capacitor at the adj-pin it seems to little no effect. Works well on the ADP163 though. 
 Simulation file attached 
 
 ADP7112 -reduce feedback loop bandwidth .asc 
 
 Best regards 
 Basti

bgonzales · Answer

Hi Basti, 
 That waveforms you're seeing is just because of how the ADP7112 was modelled. Ripple rejection going to the input is present on the actual device but may not be as accurately modelled in the LTspice. 
 I highly suggest primarily increasing the COUT to improve ripple filtering on both directions. 
 Regards, 
 Bryan