I have designed my own PCB with the LTC4421 IC to provide a high power battery backup to fit my application. The schematic is very similar in layout to the evaluation board (DC2866A), but with some minor changes. I have added a pre-charge circuit for the charge pump and I have reversed the priority of the channels. The MOSFETs used on channel 1 (Vbatt) are IXFK360N15T2, and the current limit is set to 50A (Rsense = 500 uΩ). The MOSFETs on channel 2 are IXFH320N10T2, and the current limit is set to 25A (Rsense = 1 mΩ). Both channels will have a 15V nominal supply connected to them. There is also a 2200uF capacitor placed very close to the input of channel 2 (Vdc/dc).
I am having two main issues with this design that affect both channels. I will be explaining the issues with respect to channel 2 (Vdc/dc).
The first issue is that the charge pump does not appear to be working correctly. It charges the capacitor up to 13V at the initial startup (or when the channel is disabled). When the channel is turned on, the voltage of the charge pump capacitor remains at 13V whilst the output rises in voltage (Vout). This causes the CPOGOOD threshold to be triggered when the difference between CPO and CPOref is about 6.7V or less, and the IC consequently shuts off the channel. It then retries once the output voltage falls low enough for CPOGOOD to be greater than 6.7V (This takes a while since there is no load and the output capacitance is large). If I'm not mistaken, CPO should be rising with the output voltage, but in my case it does not. Any ideas on why this is occurring? and how to fix it?
During my attempt to debug and fix this issue I have changed a few components from the schematic I provided above, all of which remain in place.
- The charge pump capacitor was changed to 4.7uF to ensure the charge pump had enough charge for the large MOSFETs. The larger CPO capacitor did not improve anything in comparison to a 1uF capacitor, but I have not changed it back since the 1 uF was very close to the recommended minimum value.
- I also changed the MOSFET gate resistor to 10Ω to ensure the MOSFETs weren't pulling too much current when turning on.
- A 10KΩ resistor was added between the MOSFET source and ground to help bias the MOSFETs.
- I changed the UVF, UVR and OV resistor values to completely eliminate any UV motorboating events (or OV events).
Here is the overview of the reoccurring events and the zoomed-in scope views of a single event. CH1 is the output voltage, CH2 is the gate voltage, CH3 is the input voltage.
Here are the charge pump voltages across the capacitor before (left) and after (right) the channel is turned on. CH1 is the output voltage, CH4 is the CPO voltage. I have placed cursors on both images so that you can easily read the difference in voltage between the two waveforms. CPO does not rise with the output voltage.
The second issue I have is the ringing or large oscillations on the input, output, gate and CPO waveforms. From memory, the ringing is > 2KHz. I have no idea if the ringing is present once a channel is fully enabled because of the issue explained above, but I also do not mind if this occurs only whilst it is turning on or switching channels. I have disabled the majority of surrounding circuits that arent part of the schematic shown above and have tried several things to mitigate this ringing. The first change was trying to determine whether I accidentally created this with a combination of inductance, resistance (mainly from sense resistor) and capacitance (mainly from output capacitor). I tried adding a load, changing the capacitance at the output and adding capacitance to the input, but this barely changed the result. I am now thinking it could be caused by something inside of the IC as a result of its current configuration in this design. Or is this just something to do with the transistors themselves? Any ideas on why this would be happening?
Thanks for your help.