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ADP5037 VOUT1 output fails to start (sometimes)

I'm using an ADP5037 to generate 4 supply rails in a sequenced-startup configuration.  Sometimes the VOUT1 converter fails to turn on as expected.  It appears to be related to the ramp time on my input power--if I use a power supply with a faster ramp time (<5 ms) I seem to get reliable startup.

Here's my configuration:


VOUT1 set for 2.5V

VOUT2 set for 1.3V

VOUT3 set for 3.0V

VOUT4 set for 1.3V

The startup sequence is:

EN2 and EN4 (tied together) are asserted and the corresponding output voltages appear.

EN1 is asserted ~0.6ms later but VOUT1 sometimes turns on and sometimes does not.

EN3 is not asserted during power up.

Plots showing turn turn on and failed turn-on sequence are attached.

I've noticed that toggling EN1 will cause VOUT1 to start.

Any thoughts as to why VOUT1 won't turn on initially during some power-up sequences?

  • Hi JeffP,

    This is unusual behavior for Buck1. I'm wondering if you're seeing this just on a single part, can you try swapping ICs?

    Best regards,


  • Jess,

    I've seen this across multiple boards; it's not limited to a single sample.


  • Hi Jeff,

    Can you share your schematic and layout files? You can post it here, or send it to me via email.

    Best regards,


  • Jess,

    I think I tracked down the problem, or at least found a way to fix the symptoms.  In my design, I'm using BUCK1 for 2.5V and BUCK2 for 1.3V.  My power supply sequencing has BUCK2 enabled early in the turn-on sequence, basically tracking VCC_IN.  It looks like BUCK2 glitches several times as the input power rises, probably because VCC has not reached an adequate level, dropping below the undervoltage lockout as BUCK2 attempts to start.  See attached plot.  The "3.3V" input to the ADP5037 is around 2.4-2.5V when the glitches occur.  On power-up sequences without the glitching on the BUCK2 output, the BUCK1 regulator will start reliably.  I found that adding more capacitance to the 3.3V rail reduce the failure rate, so again I attribute the problem to the glitches as BUCK2 starts up.  All I can guess is that having BUCK2 turn on/off several times on power up somehow confuses the BUCK1 enable logic.  I guess that'd be a question for one of the chip designers.

    I don't have a great way to fix my design, but I was able to add an RC startup delay that postpones the BUCK2 (and BUCK1) enable until the input power supply has had more time to stabilize.  I only saw this problem when using a particular lab power supply with a relatively slow ramp up time.  When I respin my PCB, I may include some watchdog circuitry that keeps the enables inactive until VCC has reached a safe level (2.8-3.0V?).  My design is space-constrained, so it'd have to be a small watchdog (e.g., uBGA package, under 4 mm^2, etc.)

    Thanks for listening!


    Glitches present, 2.5V (BUCK1) doesn't start:

    Fewer glitches, BUCK2 (2.5V) starts:

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