PSM does not work within Auto PWM/PSM mode in the ADP5034

Hi RadekN,

Buck2 at light load should be working in PSM below PSM threshold. I cannot think of any other reason unless the chip has been subjected to more than its Abs Max rating that can render it to malfunction. Please try to replace with fresh part and compare performance. You may also want to attach waveform here (VIN, VOUT, VSW) so I can help check.

Thank you for the answer. 

I replaced the chip with a brand new part. Unfortunately, the result is exactly the same. Please find below waveforms (VIN, VOUT, SW) i registered on the Buck2 at load 33 mA.   

VIN2: 

SW2: 

VOUT2: 

VOUT2_2: 

...and the ADP5034 environment:

Taking an occasion, I would like to ask for the block diagram in the ADP5034 datasheet, rev. E. See the picture below.

It looks as Buck2 operation mode is set by MODE or MODE2 signals selected by OPMODE signal.

It there a chance, the behavior we observe is caused by MODE2 signal and it forces PWM mode somehow?  

Any further suggestion is welcome.

BTW, I have checked more our units with this chip and found a such behavior on 40% of samples. 

At the same time, Buck1 set to VOUT1 = 3V and working with load 2mA, it operates in PSM without any problem.

I would like to provide you with some update.

When I replaced the original inductor, 1uH (WURTH ELEKTRONIK 744028001) with 2.2uH (WURTH ELEKTRONIK 744025002), the ADP5034, Buck2 switched to PSM at Iload = 33mA.

Can you help me to understand how the inductance affects the Auto PSM/PWM mode?   

The issue become even more interesting, when I replaced the inductor 1uH with 2.2uH in the second unit where the ADP5034, Buck2  was stuck at PWM mode.

The Buck2 switched to PSM as expected, but then Buck1 (Vout = 3 V @ Iload = 2.3 mA) switched to PWM mode. In this case, I replaced the inductor, 1uH with 2.2uH in the Buck1 circuit, as well. Now both Buck1 & 2 operates in PSM mode.

With higher inductance Iripple is lowered. Does it mean I should look at Ipeak value as the PSM Current Threshold?

The PSM current threshold of the bucks are supposed to be constant at 100mA regardless of duty and inductor value. A design technique was used to achieve this for better efficiency performance at all output load currents. Can you make sure that the VOUT1/VOUT2 sense lines in the PCB layout are good that directly connects right at the output caps? Layout guidelines are recommended.

I would be keen to check this more in bench. Can you share project details and estimate annual usage?

Hi Fil, and thanks for your reply.

Let me start from a sorry for too long comment below.

Schematic and conditions:
The ADP5034 chip is used in the circuit - see schematics in one of my previous comments, where;
VIN1, VIN2 ('VBAT') = 3.6V ~ 4.2V from Li-Ion battery, but during the test a Programmable Power Supply with constant 4.2V was used.
VOUT1 ('3V') = 3.0V, Iload1 = 1 ~ 250 mA; typ. 200 mA
VOUT2 ('V_CORE') = 1.325V, Iload2 = 30 ~ 50 mA; typ. 33 mA

PCB layout:
Unfortunately the PCB layout, I would describe as sub-optimal, unfortunately.
The capacitor is placed just near the Vout and it is followed by inductor with a path going back under the capacitor back to switching output, SW pin.
Divider resistors in the feedback are placed after inductor and the return path is routed under inductor and capacitor between Vout and SW paths, back to the FB pin.

Problem:
I understand the layout can disrupt the Buck stability. But we do not observe any issue regarding the output voltage stability during our device operation.
The only strange behavior we noticed was much shorter life time on battery caused by much worse Buck efficiency than expected for low current. And we confirmed it was caused by the Buck operating in PWM instead of PSM.
The problem was the same at experiment we made when we provided power supply from the Programmable Power Supply and also when the resistor 100 Ohm was connected to Vout2 instead of MCU forcing the load ~13 mA.

Even if the layout is not correct and FB is exposed to disturbances from the inductor and voltage fluctuations after it, it is not clear for me how this can affect the PSM Current threshold and lock the Buck in PWM mode, especially if the nominal load is much below then specified threshold.

My theory:
Looking on the ADP5034 block diagram, I would expect the current is probed at the upper switching transistor, between VIN and SW pins and compared with the PSM Current threshold.

Higher inductance lowers ripple current and peak current at the same time.
With formulas from the ADP5034 peak current can be calculated for specified inductance, I peak:
- 183 mA @1uH and
- 101 mA @2.2uH.

Maybe, in case of I peak = 183 mA, the time where the higher current is flowing through the upper switching transistor is long enough to be probed and compared with the PSM Current Threshold - and the buck is locked in PWM mode.
In case of 2.2uH and Ipeak = 101 mA the time where the current value is above the threshold is significantly shorter, thus the buck is able to switch to PSM.

Does a such explanation has any sens to you? I really would like to understand this phenomenon.

General project info:
I just step in to the project to investigate the problem. It is just before MP.
As POC, this device version is expected to be produced only a few hundreds per year. Nevertheless, we really need to know how to fix the problem on the current design version and to be sure the next one will be free of this issue.

Hi Fil,

Is there any possibility you can lend us ADP5034RE-EVALZ Evaluation Board or may we send you a one ADP5034 sample for verification? Maybe the phenomenon is not caused by the circuit but by the chip itself?

What do you think?

Hi RadekN,

Yes, please. Please send me one ADP5034 sample.  I don't think though it has issue with the chip but I'd like to investigate further by testing using your schematic. Please give me at least a week to check this.

Please send me email at fil.balat@analog.com send me PDF schematic and PCB layout. I'll provide shipment address by email.

Hi RadekN,

Yes, please. Please send me one ADP5034 sample.  I don't think though it has issue with the chip but I'd like to investigate further by testing using your schematic. Please give me at least a week to check this.

Please send me email at fil.balat@analog.com send me PDF schematic and PCB layout. I'll provide shipment address by email.