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LTC3895 BG pin is burned and shorted to GND

The issue is about a buck converter design using LTC3895. The reference design for LTC3895 is followed to regulate from 48V to 36V. The schematic for the output circuitry is shown Fig. 1. The buck converter output is to a min 3.6 ohm load for 10A max current. The BG voltage is monitored and shown at Fig. 2. During start up, the BG voltage stays at 10V and there is no over-voltage detected. But over 3 cycles, the BG voltage degrades and pulled down to 1V (2V/div vertically), indicating a damage to the BG output. The power to the board is turned off and the resistance is measured between BG and GND. Resistance measurement shows 0 ohm between the BG and GND pins, indicating a short. 

Questions:

1. What are the design concerns for LTC3895 design I need to be aware of for this case?

2. What are the recommendations for the design?

3. Any similar cases reported?

4. Any comments on the BG voltage degradation over initial transient?

Fig. 1 LTC3895 output circuitry

Fig. 2 LTC3895 grounding scheme

Fig. 3 BG voltage

Parents
  • The LTC3895's high current gate driver is capable of generating short off times (top MOSFET gate when near full duty or bottom MOSFET gate when top MOSFET is near minimum duty cycle). Long gate traces and/or high gate charge MOSFETs can result in voltage spikes (above the gate driver's 11V abs max) during these short gate off times.

    Lowering trace inductance, MOSFET gate charge and gate drive voltage (8V with DRVSET=82K) will help. A small capacitor (typically around 1nF) from TG to SW and from BG to GND placed very close to the IC can also be used to reduce voltage at the gate pins.

    A previous post regarding the similar LTC7801 also discusses this. Please see https://ez.analog.com/power/f/q-a/114497/ltc7801-issues/343255#343255

  • Kirk,

    This discussion is on the right track. The interesting thing is the following scope capture. In the time resolution provided, we didn't observe any overshoot on the BG side (light brown), but it degrades. If the spike on BG would damage the driver, what is the typically time scale I should be using to capture that spike? For the BG gate driver, is it a push-pull output? Is it a weak NMOS? 

  • It depends on your gate charge, but likely not above 2us/div if looking for <100ns off times and < 10ns spikes. Yes, it is a push-pull output. The pull down is stronger than the pull up and capable of sinking almost 2A.

  • I'm having the same problem as you.
    Did you solve your problem?

  • I would suggest trying the changes above (<=8V gate drive voltage and 1nF to 2.2nF capacitors from TG to SW and from BG to GND placed very close to the IC). If you have already tried, you might consider adding an external diode from DRVCC to BOOST (PME20010ER or similar - see discussions on LTC7862 Data Sheet page 22 and LTC7810 Data Sheet pages 27,28) in case boost refresh could use some help. 

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  • I would suggest trying the changes above (<=8V gate drive voltage and 1nF to 2.2nF capacitors from TG to SW and from BG to GND placed very close to the IC). If you have already tried, you might consider adding an external diode from DRVCC to BOOST (PME20010ER or similar - see discussions on LTC7862 Data Sheet page 22 and LTC7810 Data Sheet pages 27,28) in case boost refresh could use some help. 

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