I want to use an almost unmodified version of the provided 8228 example as a sub circuit as part of a hierarchical schematic.
I am new to LTspice, but have had success with hiarchacial schematics, using the Hierarchy → Open this sheets symbol → 'Shall I try to automatically generate one' approach. Adding ports to the 'subcircuit.asc'.
When I try run the 8228.asc as a sub circuit, the progress status in the bottom left hand side is unlike what I have seen other simulations. The simulation takes ages to try to simulate, then complains as per the below picture. See image below
Is it possible to use the 8228.asc or component as part of a hierarchical schematic design? If so, how?
My ultimate goal, is to create a multi test jig. So I can test multi aspects at the same time. Thus wanted to use the same sub-circuit many times.