The LT3045-1 datasheet specified the absolute maximum Out-To-OUTS Differential Voltage with 1.2Vpp and that this would be guaranteed by design. What does that mean? Is there some kind of clamping like antiparallel diodes so that a greater difference cannot happen.Or is there sensitive circuitry that would be damaged if the differential voltage would be higher (but that would not really go with the "guaranteed by design" in note 14).
The purpose of the question is that it would be nice to have a voltage supply just a bit above the LT3045's output voltage in order to supply a non-RR-input op-amp, the input of which could go up to the LT3045's output voltage. If one would connect a diode or a z-diode-like connected transistor (current from collector to emitter while there is a voltage divider from collector to emitter with the tap connected to the base and the collector to base resistor value being half the value of the base to emitter resistor, creating something like an 1V z-diode) between OUT and OUTS, there would be a supply of about 1V above the regulators output (which now has to be taken from the OUTS pin). This 1V higher auxiliary output would, of course, be a bit dependent on the load current and also on temperature (unless the C-E Resistor was made to have 10000 ppm/k positive temperature dependence), but as a supply for an op-amp it should be OK. With 1V the maximum 1.2V would not be violated, but if there are clamping diodes within the chip, that concept wouldn't work.
Just using a DMM, OUT is clamped around 1.9V above OUTS, but OUTS is not clamped above OUT.
Nice, thank you.
What tho you think of the above idea to generate a slightly higher auxiliary voltage?
Do you have something that I could use instead of the diode or z-diode-like connected transistor? Something like a 1V or 1.2V shunt regulator?
GerdF said:What tho you think of the above idea to generate a slightly higher auxiliary voltage?
Could you comment on that question?
Also, there are various aspects tied to the voltage difference between IN and OUT:
One being the output voltage dropping from the set value due to the required collector to emitter voltage of the output transistor (determined by the difference voltage between IN and OUT), which also determines the majority of the power dissipated by the IC, and another one being the voltage that is required for the reference current generation (determined by the difference voltage between IN and OUTS/REF).
This seems to be reflected in the low dropout voltage of aroung 260mV and the relatively high IN to OUT difference for avoiding detrimental effects on the PSRR (and maybe also on the noise behavior).
Introducing an additional voltage drop between OUT and OUTS could reduce power dissipation in the output transistor (distributing the heat generated between the regulator IC and a possible diode inserted between OUT and OUTS) by reducing the IN to OUT voltage difference while keeping the IN to OUTS/REF voltage difference needed for optimum PSRR performance.
What do you or the chip designer(s) think about this?