LTC4162EUFD-LAD charger (12V/2.5 A) problem

Hello,

I am developping a charging board for lithium battery (2 cells) based on LTC4162EUFD-LAD with a charger 12V/2.5A. I made some samples and all working fine . Now we produce the pre-release series and one problem comes out ( identical components and PCB layout). If we try to charge the battery using the charger 12V/2.5 A the LTC4162 fails battery detection ( repeat battery detection every 30 secods as datasheet describes). Instead with a charger 15V/2A all works fine. Do you have some suggestions? I mean where  should I check to verify why battery detection fail.

Thank you.

Gaetano

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  • 0
    •  Analog Employees 
    on Sep 23, 2020 5:49 PM 2 months ago

    Hi Gaetano,

    Can you send a schematic?

    Take a look at the voltage on the battery node with no battery connected but input voltage present. Every 30 sec, you should see the voltage pop up to the battery float voltage. Can you capture a scope plot of that?

    Also, what does that event look like with the battery connected?

    Regards,

    Zack

  • Hi Zack,

    thank you for your reply.  I found a strange behaviour.

    My current set-up is:

    • Icharge = 1 A ( max current for recharging battery)
    • Iin=1.5 A (max current requested to the charger)
    • Charger is 12V/2.5A

    If I decrease the Icharge to 0.7 A  almost all boards work fine ( using 12 V/2.5A charger) but one of them needs to reduce the Icharge to 0.5 A. That's really strange. Moreover if I move charger and battery to the first samples all working fine with my original current set-up (charge = 1 A ) . It looks like an unwanted current absorption . What do you think? Wrong way to soldered LTC4162 or maybe tollerance of passive components?

    I wasn't in office today so I'll send you the picture of scope tomorrow.

    Regards.

    Gaetano

     
  • 0
    •  Analog Employees 
    on Sep 24, 2020 9:45 PM 2 months ago in reply to gaetano

    Hi Gaetano,

    Hmm, failure at higher currents is usually indicative of a layout issue, though that may not be the case here. Regardless, can you send your layout?

    Regards,

    Zack

  • Hi Zack,

    attached you can find the layout. Just to recap. We produced 10 boards and all work fine with the follow configuration ( I'll call it whished configuration):

    • Icharge =1 A, Ilimit=1.5 A
    • charger 12V/2.5A

    We carried out a lot of test and no problem like this came out. After that we produced 30 identical boards( layout, BOM , etc.) and I saw these strange behaviours. Moreover 23 boards work fine with our "whished configuration" and 7 of them need Icharge lower ( Icharge =0.5 A). These seven boards work fine with our "whished configuration"but  if I use a battery not completely descharged ( 8 Volt , our battery is 2 cells ). Components are not soldered by hands and PCBs are made at the same time.

    I can reduce Icharge( it' isn't critical ) but I want to  understand where is/are the faults (production, project limitation,etc).

    Reagrds,

    Gaetano

  • 0
    •  Analog Employees 
    on Oct 1, 2020 4:53 PM 1 month ago in reply to gaetano

    Hi Gaetano,

    Is this a two-layer board? It is possible to route this on two layers but there is more room for error. What temperature does it reach?

    Also, I can't really see the bottom layer, but is there a good path from the GND side of the VCC2P5 cap back to the IC GND pad? Can you send the bottom layer as well?

    Regards,

    Zack

  • Hi Zack,

    yes the board is two layers. IC reaches the follow temperature:

    • when Icharge=1 A during costant current phase temperature is 72 °C
    • when Icharge=0.5 A during costant current phase temperature is 62 °C
    • of course during costant voltage phase decrease until 40 °C
    • fault occurs at start so I think it isnt temperature the problem

    Can you send me something about the layout guidelines ( link or document)?

    If you give me an email I'll send you the gerber files if needed.

    I still don't understand why  , when  battery is really descharged , charger 15V/2A works fine instead charger 12V/2.5 A not .

    Do you have any idea?

    Regards,

    Gaetano

  • +1
    •  Analog Employees 
    on Oct 7, 2020 9:21 PM 1 month ago in reply to gaetano

    Hi Gaetano,

    This is perfect, thanks.

    2 layers can be difficult for routing. The VCC2P5 cap is particularly critical and doesn't have a great GND return path here due to routing being cut off on the bottom layer:

    The red line shows the current shortest return path. The green line shows how I recommend that you modify your current design. You should etch away the soldermask and make a shorter connection back to the GND paddle of the IC.

    Another thing I notice is that there seems to be universally-used large components. While I understand this makes soldering easier, there are a few instances where size does matter. Namely, again, the VCC2P5 cap should be smaller than INTVCC or it can pull too much current at startup. I recommend you use the 0402 package as is done on the demo board. Are the values the same?

    I actually can't enlarge your schematic to view it. Can you re-send it?

    For the rest of your components, the actual placement looks good, but the grounding is problematic. Look at the battery capacitor for example - how does it get back to the charger's GND reference?

    So, I think the underlying issue here is grounding and that is largely a result of doing this on 2 layers. That is not to say it can't be done - it can - but you need to have the grounding as a goal from the beginning or else the layout becomes problematic.

    I think you can add a few mods to the board to get this working for now or at least improve operation. I do recommend you redo the layout before going to production.

    Regards,

    Zack

Reply
  • +1
    •  Analog Employees 
    on Oct 7, 2020 9:21 PM 1 month ago in reply to gaetano

    Hi Gaetano,

    This is perfect, thanks.

    2 layers can be difficult for routing. The VCC2P5 cap is particularly critical and doesn't have a great GND return path here due to routing being cut off on the bottom layer:

    The red line shows the current shortest return path. The green line shows how I recommend that you modify your current design. You should etch away the soldermask and make a shorter connection back to the GND paddle of the IC.

    Another thing I notice is that there seems to be universally-used large components. While I understand this makes soldering easier, there are a few instances where size does matter. Namely, again, the VCC2P5 cap should be smaller than INTVCC or it can pull too much current at startup. I recommend you use the 0402 package as is done on the demo board. Are the values the same?

    I actually can't enlarge your schematic to view it. Can you re-send it?

    For the rest of your components, the actual placement looks good, but the grounding is problematic. Look at the battery capacitor for example - how does it get back to the charger's GND reference?

    So, I think the underlying issue here is grounding and that is largely a result of doing this on 2 layers. That is not to say it can't be done - it can - but you need to have the grounding as a goal from the beginning or else the layout becomes problematic.

    I think you can add a few mods to the board to get this working for now or at least improve operation. I do recommend you redo the layout before going to production.

    Regards,

    Zack

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