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LTC4380: Acceptable values for R2, R3, C2 (BOM reduction)

In the datasheet is clearly noted that R2, R3, and C2 should always be applied. In my design i have no other 10R, 33R and 47nF components, so basically these add 3 components to my BOM that is already to long the way it is. I would like to replace the suggested values by parts that are already used in the design. The closest values available are 120R and 100nF. 

My understanding of electronics is somewhat limited. I understand C2 controls how fast the FET starts to conduct current (inrush limiting). I do not care about that, so i'm guessing 100nF should be fine here right? 

So what does this mean for R2? As far as I understand it only charges C2 and does this with a constant current or 20nA. If so, wil 120R or 60R  work( 2x 120R parallel). I'm guessing startup time will be approx 6 times slower than standard when using a 120R resistor and a 100nF cap, or will i run into other issues? 


I do not fully understand the exact purpose of R3, but only 10R is suggested throughout the datasheet. Will 120R be a acceptable replacement? If not maybe 60R?

Maybe a compromise is to use 100nF for C2, 10R for R3, and 20R (2x10 in series) for R2. This will only cost me 1 additional part instead of 3.

Thanks in advance for your input!

  • Dear SuperKris, if -as you stated- your electronic knowledge is limited: Are you sure you want to 'leave' the path for a succesful design as it is been laid out in our datasheet?
    The mentioned values are recommended 'minimum values' to compensate the loop, any larger value might be ok but behaviour in general should be checked (I recommend to use LTSpice simulation for this purpose). But I do see myself not as a car dealer who sells a car to a guy with no driving licence and just explain general driving guidelines in 5 sentences. If you are on a way to cost reduction which is always a nice thing you should be aware of all consequences and understand the basic principle of their function.

    Other way 'round': Your suggested values might be ok, but I cannot judge on this right from my gut feeling and recommend strongly the use of LTSpice upfront as first step. The real hardware has to be tested afterwards as well and should be optimized to your needs with the external components.

  • Thank you for you kind reply!

    As is stated my knowledge limited, but that doesnt mean i dont understand electronics. I'm just not on that senior engeneering level. That said, bom reduction makes sense. I'm well over 200 parts for this design with approx 40 unique components of which not all are SMD. I would like to keep this list as short as possible especially for generic components like resistors and caps.

    I have not tried simulating this in LTSpice as i had doubts the simulation model would be advanced enough to actually do something with these values. I have however already build the schematic in LTSpice so i can easily test is. I just hope the real world application acts in a similar way.

    Of course i will be testing the hardware, but i do not have all the equipment to do load dump test. I would expect that my alternative values would work in general, but stability issues might occur and it will be very hard to tie those issues directly to te values of C2, R2 and R3.

    That is why i posted my question here to reach the experts for particular device. Somebody came up with the values in the datasheet, but for me its hard to spot a obvious reason why the values were chosen.

  • So i did the simulations and in LTSpice there is no difference if i change the resistors.

    I was expecting to see this for R3. I still dont fully understand what a 10R is supposed to do here, but i can place it anyway. I would just prefer it to be 120 ohm as that value is already available

    For C2 there is a clear difference. 100n gives me a startup of 110ms, For 47n its approx 65ms. I guess im fine with both

    I would expect to see a difference for R2, but i see no difference in simulation. 10, or 1000R. Start up time is exactly the same. 

  • Hi SuperKris,

    I'm just going through the same process of BOM reduction so wondering how this went for you? What values did you use in the end?

    I see in the data sheet that R3 10R is to suppress parasitic oscillation at the MOSFET gate. I would imagine anything up to about 100R would do here. My FET SQM90142E has a 3.2nF gate with 100R would be 320ns time constant. That does not seem significant for the gate switching times, but if it is, please someone let me know!

    Figure 7 shows R2 = 150R and C2 = 100nF so I'm thinking I can use 100R and 100nF for those as well. As seen in your simulation the start up increased to 110ms. Also the data sheet says "C2 can be added to reduce the inrush current at the expense of slower turn-off time".

    Any feedback on what you ended up doing would be great!

    Thanks, Ken