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LTC3731 Datasheet explanation

Hello,

I am trying to create a simulation model for LTC3731. Could you, please, provide the following information, which can not be found in its datasheet:

1. What is output impedance or voltage  gain of transconductance amplifier EA.

2. Parameters of slope compensation.

3. Datasheet says that Vsense threshold voltage is 75mV, but this signal from sense resistor goes through internal divider  of 0.6(36k and 54k).

    Does this mean that internal threshold is not 75mV but 75mV*.0.6=45mV?

4. What does "Overvoltage soft latch" mean?

5. What is a behaviour of the controller when the voltage on EAin pin is higher than 0.66V and triggers OV comparator?

Thanks in advance.

Regards

Lev

  • Hello Lev,

    Here are the answers to your questions:

    1. The output impedance of the voltage error amplifier is roughly 200kOhms typical based on the load regulation specification. The gm is 5mmho typical, as stated in the data sheet.
    2. The slope compensation curve can be found from the Vsense(max) vs duty cycle curve on page 7 of the data sheet by subtracting the value shown in the curve from 75mV. The slope compensation equation is:
                Slope comp = [58 * (Duty/100)^2 – 18 * (Duty/100)] mV
                where duty is expressed as a percentage, i.e. for 50% duty cycle enter “50”
    3. The maximum current sense threshold is 75mV. This is the maximum current sense threshold between the SENSE+ and SENSE- pins of the chip.
    4. Over-voltage soft latch means that during an over-voltage condition the bottom MOSFET is latched on until the over-voltage condition is cleared. After that, the converter returns to normal operation.
    5. In addition to what is mentioned in #4 the PGOOD pin also goes low. When FB is greater than 600mV but less than the 660mV over-voltage threshold, the error amplifier will pull the ITH pin low while attempting to correct VOUT.

    Best regards,

    Mike

  • Hello Mike

    Hello Mike,
    Thank you very much for you explanation. It really helped us to solve one of our problem. But would like to ask you for another favour. Could you, please give more details how signals Ith, Slope, Vsense and Soft Start connected to I1 comparator.
    Thanks in advance.

    Lev

  • Hello Lev,

    The current sense comparator at I1 compares the ITH voltage to the differential current sense signal. The modulator gain is roughly 36mV/V and is the slope of the Isense vs ITH curve shown below.

    In the amplifer below I1, the slope compensation signal is subtracted from the ITH signal which is the same as summing it with the current sense signal. 

    The RUN/SS pin of the LTC3731 like other controllers in the LTC3728 family of parts provides soft-start by limiting the Isense threshold during ramp-up. As shown in the chart below the maximum Isense threshold increases from 20mV to the maximum of 75mV as the RUN/SS pin ramps up from 1.5V to 3.5V.

    If you have further questions then contact me at Michael.shriver@analog.com.

    Best regards,

    Mike