ADM1270 stability during Current limit Switch over

Question

Hi, 
 We are planning to design a 28V fixed power supply with adjustable current limit setting using ISET pin of ADM1270 IC in discrete steps,need to know information on how stable the device will perform,during change over from one discrete current limit step to another on the go without power OFF . 
 Our concern is, when the switch over takes place,the ISET pin will be left floating for some momentary period,will this create problems. If so we would like know about some recommendations to be carried out for safely using ADM1270 IC in our design. 
 Regards, 
 Harish.S

Empedocles · Accepted Answer

Hi Harish, 
 The way your circuit is designed means that when the lower resistor is disconnected, the voltage on ISET will be pulled up to 3.6 V (VCAP) momentarily. This means that the current limit will change to 10 A during this time as, when VISET > 2.65 V, the current limit threshold is reverts to it's default value of 50 mV. 
 
 If this behavior is undesirable, you could do one of two things. 
 
 change the rotary switch from a break-before-make to a make-before-break type so that you never have the lower side of the divider disconnected. this means that as you rotate the dial, the current limit would momentarily decrease as a pair of resistors are briefly connected in parallel. 
 Modify the circuit so that the rotary switch changes the top resistor while the bottom resistor remains connected. When the top resistor is momentarily disconnected, the current limit would briefly change to 2 A . 
 
 Please be aware that, the voltage on the FLB pin will modify current limit threshold. If you need to disable the foldback function, connect the FLB pin to VCAP. 
 If you do not require reverse input voltage protection, you can eliminate Q2. Just leave the RFPG pin float and connect VIN directly to VCC/SENSE+. 
 Regards, 
 Donal

Empedocles · Answer

Hi Harish, 
 what this spec means is that for V CC > 14 V, but less than 60 V, the gate voltage will be clamped between 10 V 
 and 14 V so the the FET will never see a |V GS | greater than this clamp value. If V CC is less than 14 V then the clamp is 
 not active and GATE pin will be at the lowest possible voltage which is GND so that the V GS applied to the FET is equal to V CC . 
 To answer your specific question, in the case of V CC = 5 V the V GS the FET will be ~5 V.

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ADM1270 stability during Current limit Switch over

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