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Question LT3980 PCB layout for PoE project

Dear sir,

Customer has a question, when designing with Linear Tech’s PoE solutions. First of all, customer would like to know if impedance matching is required for Ethernet signals from transformer to RJ45 connector. If not required, are there other requirements for layout?

E.g. spacing between differential pair. I know that it is required for sections from PHY to transformer. But if I apply the same rules to the other side of the transformer, it will be very hard to satisfy the current capacity on each trace.

E.g. in our application, the power consumption is 60 W so there will be a maximum of 350 mA on each Ethernet signal lines (4 pairs). An online calculator told me 350 mA needs a 0.3 mm wide trace on our PCB but the PCB manufacturer said 100 ohm differential impedance requires 0.09 mm wide traces. Could you give us some suggestions on this?


  • Hello Mars,

    The traces from the RJ-45 to the ethernet transformer should be very short. The ethernet transformer should be immediately next to the RJ-45. If these components are placed correctly, the traces will not be long enough to need impedance matching. Please see the suggested layout below.

    These traces need to be sized for current, and up to 0.5mm wide is normal for higher powers. Please make sure that the ethernet transformer your customer uses is rated for 350mA or more.

    Signal traces from the ethernet transformer to the PHY will need to be set per your calculations for differential impedance matching.


    Applications Engineer

    PoE Powered Devices