I am simulating the LT8362 SEPIC 5V-output circuit shown on page 24 of the datasheet:
You can download my LTspice *.asc file and associated symbols and libraries here:
I use the MacOS X version of LTspice, but I tested the above files in the Windows version and the simulation is the same. If you are using Windows, but be sure to put my files into your "Documents > LTspiceXVII > lib" path. Rename your "ISO16750-2.lib" file first though, since I made alterations to mine in order to make the simulation run faster.
My *.asc file is pretty much what you see on page 24 of the datasheet, except I added Vin and Loads to the circuit.
After you copy my files to your computer, start the simulation and probe the OUT voltage and you will see HF spikes reach 30V! (See attached "5Vout_650pSeriesInductance.png.") That's the problem. Halt the simulation, then right-click C7 (22uF cap) and delete the "Series Inductance" value of 650p. Click OK and run the simulation again. Now the OUT voltage will increase to 5V in about 900us, and all will be well with the rest of the simulation. (See attached "5Vout_NoSeriesInductance.png.") In other words, it seems the simulation is not running properly when Series Inductance is added to the capacitors. (There is no series inductance on caps in LTspice by default.)
Of course, I added the "Series Inductance" because all components have it, and 650pH is a reasonable estimate of what that 25V 22uF SMD capacitor has (according to TDK spice models I've reviewed). And yet, if I add even that tiny 650pH of series inductance, the result in the simulation is HF spikes reaching 30V. Without series inductance on the cap, the simulation runs as expected. I am curious why this is happening. It's pretty clear that something is off with the simulation seeing that Linear Tech would not put forth a demo circuit in the datasheet that they have not tested themselves.
No, I have not yet built the circuit. I am in the design stage running simulations. I would appreciate hearing your thoughts and advice.