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LTM4608A External FSW Synchronization CLK Characteristics

Hello ADI Community,

I have another question regarding the LTM4608A component.

When the CLKIN pin of the LTM4608A is being utilized for external switching frequency synchronization, what are the required characteristics of the external clock signal? For example, what is the desired logic level, Vinh & Vinl thresholds, duty cycle, timing constraints, etc.?