LTM8049
Recommended for New Designs
The LTM8049 is a Dual SEPIC/Inverting μModule® (power module) DC/DC Converter. Each of the two outputs can be easily configured as a SEPIC or Inverting...
Datasheet
LTM8049 on Analog.com
LTM4643
Recommended for New Designs
The LTM4643 is a quad DC/DC step-down µModule (power module) regulator with 3A per output. Outputs can be paralleled in an array for up to 12A capability...
Datasheet
LTM4643 on Analog.com
Hello,
I have a question to the power good pins of the LTM8049 vs LTM4643. I am using both in the same circuit. Both are enabled with RUN-pin from the same multiplexer. Both have a pull-up with 100k at their PG-pin and than drive a LED via an FDN357n. BUT only the LED of the LTM4643 is switched on/off with enable/disable. The LED of the LTM8049 is always on (but power on/off is correctly switched).
In the manual of LTM4643 it is written for the PG-pins:
"PGOOD is pulled to ground when the voltage on the FB pin is not within ±10% of the internal 0.6V reference."
In the manual of LTM8049 it is written for the PG-pins:
"These active high pins indicates that the FBn pin voltage for the corresponding channel is within 4% of its regulation voltage These open drain outputs requires a pull-up resistor to indicate power good. Also, the status of these pins is valid only when RUN >1.4V and VIN>2.6V."
Means this the power good of LTM8049 will not be pulled to ground? Which state is than the pg-pin?
The PG pin state is invalid with RUN low. I believe the internal VCC LDO does not regulate with RUN low. So, there is no way for PG to be pulled low.
You may be able to use their RUN signal as a pull-up for the PG pin. That way if RUN is low, the PG voltage will be low. RUN could be high before the output is in regulation though. So, there could be a short amount of time where PG is still invalid (high when it shouldn’t be). That is all I can suggest at the moment. There is a state diagram in the LT8582 datasheet which may be useful.
Hello
The PG pin state is invalid with RUN low. I believe the internal VCC LDO does not regulate with RUN low. So, there is no way for PG to be pulled low.
You may be able to use their RUN signal as a pull-up for the PG pin. That way if RUN is low, the PG voltage will be low. RUN could be high before the output is in regulation though. So, there could be a short amount of time where PG is still invalid (high when it shouldn’t be). That is all I can suggest at the moment. There is a state diagram in the LT8582 datasheet which may be useful.