We plan to use LTC2924 in our design, In the blog it is suggested as 200us can be achieved by using 1nF capacitor.
But in my simulation, its taking around ~470us. How I can reduce this value to <= 200us. I need each power rail need to release within 200us delay.
The simulation file attached for your end verification.
Measured using 1nF capacitor : 4885.Power_sequencer_2ICs_200us delay (1).asc
Please provide your comments