Questions about the design of LT3045-1

I am using LT3045-1 to design the power circuit. In my application, the power supply voltage of LT3045-1 is +5V, and the output voltage is required to be adjustable in three levels, respectively: +0V, +1.5V, +4V, the maximum load current of LT3045-1 is 200mA. The switching time between each output voltage level needs to be as small as possible, and cannot be greater than 60ms.
So I want to confirm:
1. Since the smaller voltage adjustment time, the better, we can't connect a Cset to Pin8, because we can't use the 'Fast Start-Up Capability' when the output voltage levels is 0V. And the disadvantage of this is that the output noise becomes larger. The 2mA of 'Fast Start-Up Capability' introduced in the datasheet is only prepared for the fast charging of Cset. As long as the voltage of 'SET' (Pin8) can change in time, then the output voltage also changes in time. Am I understanding that right? Is the output voltage adjustment time of LT3045-1 greatly affected by the load capacitance?
2. I want to know whether the voltage drop will occur due to the excessive load capacitance at the instant of LDO startup? After using the "Programmable Current Limit" function, when the load capacitance is too large, the LDO is equivalent to a constant current source to charge the capacitor until the voltage reaches the preset value? Or because of the large transient load current, the LDO can't work directly?
During the power-up, how much load capacitive can the LT3045-1 experience? How to judge this?
3. At the same time, I am curious about DC-DC. Although I know that too large a load capacitance helps reduce ripple, it may cause the original DC-DC feedback loop to be unstable. In spite of this, in order to have a good decoupling effect, I still put more capacitors. In this regard, how do I judge how much capacitive load may cause the DC-DC to fail to start normally? Or does the current DC-DC generally have a soft start circuit, so as long as the load is within the rated power of the DC-DC chip, and leave some margin, there will be no problem?Although different devices have different characteristics, is there a simple judgment rule?
Looking forward to your answer, thank you very much!

  • 0
    •  Analog Employees 
    on Jul 9, 2020 10:59 PM

    Are you talking about the transient response when the output voltage changes, or the start-up? The SET current is 2mA only when PGFB is below 300mV. The circuit transient performance is related to the LDO, which has a high bandwidth, and the load. If the output cap is very large, the system bandwidth is low, so the output voltage needs a longer time to settle down. You can simulate your circuit using LTspice.